1*0f23ed0eSBhargav Joshi# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 2*0f23ed0eSBhargav Joshi%YAML 1.2 3*0f23ed0eSBhargav Joshi--- 4*0f23ed0eSBhargav Joshi$id: http://devicetree.org/schemas/sound/ti,omap4-dmic.yaml# 5*0f23ed0eSBhargav Joshi$schema: http://devicetree.org/meta-schemas/core.yaml# 6*0f23ed0eSBhargav Joshi 7*0f23ed0eSBhargav Joshititle: Texas Instruments OMAP4+ Digital Microphone Module 8*0f23ed0eSBhargav Joshi 9*0f23ed0eSBhargav Joshimaintainers: 10*0f23ed0eSBhargav Joshi - Peter Ujfalusi <peter.ujfalusi@ti.com> 11*0f23ed0eSBhargav Joshi 12*0f23ed0eSBhargav Joshiproperties: 13*0f23ed0eSBhargav Joshi compatible: 14*0f23ed0eSBhargav Joshi const: ti,omap4-dmic 15*0f23ed0eSBhargav Joshi 16*0f23ed0eSBhargav Joshi reg: 17*0f23ed0eSBhargav Joshi items: 18*0f23ed0eSBhargav Joshi - description: MPU access base address 19*0f23ed0eSBhargav Joshi - description: L3 interconnect address 20*0f23ed0eSBhargav Joshi 21*0f23ed0eSBhargav Joshi reg-names: 22*0f23ed0eSBhargav Joshi items: 23*0f23ed0eSBhargav Joshi - const: mpu 24*0f23ed0eSBhargav Joshi - const: dma 25*0f23ed0eSBhargav Joshi 26*0f23ed0eSBhargav Joshi interrupts: 27*0f23ed0eSBhargav Joshi maxItems: 1 28*0f23ed0eSBhargav Joshi 29*0f23ed0eSBhargav Joshi dmas: 30*0f23ed0eSBhargav Joshi maxItems: 1 31*0f23ed0eSBhargav Joshi 32*0f23ed0eSBhargav Joshi dma-names: 33*0f23ed0eSBhargav Joshi items: 34*0f23ed0eSBhargav Joshi - const: up_link 35*0f23ed0eSBhargav Joshi 36*0f23ed0eSBhargav Joshirequired: 37*0f23ed0eSBhargav Joshi - compatible 38*0f23ed0eSBhargav Joshi - reg 39*0f23ed0eSBhargav Joshi - reg-names 40*0f23ed0eSBhargav Joshi - interrupts 41*0f23ed0eSBhargav Joshi - dmas 42*0f23ed0eSBhargav Joshi - dma-names 43*0f23ed0eSBhargav Joshi 44*0f23ed0eSBhargav JoshiadditionalProperties: false 45*0f23ed0eSBhargav Joshi 46*0f23ed0eSBhargav Joshiexamples: 47*0f23ed0eSBhargav Joshi - | 48*0f23ed0eSBhargav Joshi #include <dt-bindings/interrupt-controller/arm-gic.h> 49*0f23ed0eSBhargav Joshi 50*0f23ed0eSBhargav Joshi dmic@0 { 51*0f23ed0eSBhargav Joshi compatible = "ti,omap4-dmic"; 52*0f23ed0eSBhargav Joshi reg = <0x0 0x7f>, /* MPU private access */ 53*0f23ed0eSBhargav Joshi <0x4902e000 0x7f>; /* L3 Interconnect */ 54*0f23ed0eSBhargav Joshi reg-names = "mpu", "dma"; 55*0f23ed0eSBhargav Joshi interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>; 56*0f23ed0eSBhargav Joshi dmas = <&sdma 67>; 57*0f23ed0eSBhargav Joshi dma-names = "up_link"; 58*0f23ed0eSBhargav Joshi }; 59