1*d9afe0d3SWalker Chen# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*d9afe0d3SWalker Chen%YAML 1.2 3*d9afe0d3SWalker Chen--- 4*d9afe0d3SWalker Chen$id: http://devicetree.org/schemas/sound/starfive,jh7110-tdm.yaml# 5*d9afe0d3SWalker Chen$schema: http://devicetree.org/meta-schemas/core.yaml# 6*d9afe0d3SWalker Chen 7*d9afe0d3SWalker Chentitle: StarFive JH7110 TDM Controller 8*d9afe0d3SWalker Chen 9*d9afe0d3SWalker Chendescription: | 10*d9afe0d3SWalker Chen The TDM Controller is a Time Division Multiplexed audio interface 11*d9afe0d3SWalker Chen integrated in StarFive JH7110 SoC, allowing up to 8 channels of 12*d9afe0d3SWalker Chen audio over a serial interface. The TDM controller can operate both 13*d9afe0d3SWalker Chen in master and slave mode. 14*d9afe0d3SWalker Chen 15*d9afe0d3SWalker Chenmaintainers: 16*d9afe0d3SWalker Chen - Walker Chen <walker.chen@starfivetech.com> 17*d9afe0d3SWalker Chen 18*d9afe0d3SWalker ChenallOf: 19*d9afe0d3SWalker Chen - $ref: dai-common.yaml# 20*d9afe0d3SWalker Chen 21*d9afe0d3SWalker Chenproperties: 22*d9afe0d3SWalker Chen compatible: 23*d9afe0d3SWalker Chen enum: 24*d9afe0d3SWalker Chen - starfive,jh7110-tdm 25*d9afe0d3SWalker Chen 26*d9afe0d3SWalker Chen reg: 27*d9afe0d3SWalker Chen maxItems: 1 28*d9afe0d3SWalker Chen 29*d9afe0d3SWalker Chen clocks: 30*d9afe0d3SWalker Chen items: 31*d9afe0d3SWalker Chen - description: TDM AHB Clock 32*d9afe0d3SWalker Chen - description: TDM APB Clock 33*d9afe0d3SWalker Chen - description: TDM Internal Clock 34*d9afe0d3SWalker Chen - description: TDM Clock 35*d9afe0d3SWalker Chen - description: Inner MCLK 36*d9afe0d3SWalker Chen - description: TDM External Clock 37*d9afe0d3SWalker Chen 38*d9afe0d3SWalker Chen clock-names: 39*d9afe0d3SWalker Chen items: 40*d9afe0d3SWalker Chen - const: tdm_ahb 41*d9afe0d3SWalker Chen - const: tdm_apb 42*d9afe0d3SWalker Chen - const: tdm_internal 43*d9afe0d3SWalker Chen - const: tdm 44*d9afe0d3SWalker Chen - const: mclk_inner 45*d9afe0d3SWalker Chen - const: tdm_ext 46*d9afe0d3SWalker Chen 47*d9afe0d3SWalker Chen resets: 48*d9afe0d3SWalker Chen items: 49*d9afe0d3SWalker Chen - description: tdm ahb reset line 50*d9afe0d3SWalker Chen - description: tdm apb reset line 51*d9afe0d3SWalker Chen - description: tdm core reset line 52*d9afe0d3SWalker Chen 53*d9afe0d3SWalker Chen dmas: 54*d9afe0d3SWalker Chen items: 55*d9afe0d3SWalker Chen - description: RX DMA Channel 56*d9afe0d3SWalker Chen - description: TX DMA Channel 57*d9afe0d3SWalker Chen 58*d9afe0d3SWalker Chen dma-names: 59*d9afe0d3SWalker Chen items: 60*d9afe0d3SWalker Chen - const: rx 61*d9afe0d3SWalker Chen - const: tx 62*d9afe0d3SWalker Chen 63*d9afe0d3SWalker Chen "#sound-dai-cells": 64*d9afe0d3SWalker Chen const: 0 65*d9afe0d3SWalker Chen 66*d9afe0d3SWalker Chenrequired: 67*d9afe0d3SWalker Chen - compatible 68*d9afe0d3SWalker Chen - reg 69*d9afe0d3SWalker Chen - clocks 70*d9afe0d3SWalker Chen - clock-names 71*d9afe0d3SWalker Chen - resets 72*d9afe0d3SWalker Chen - dmas 73*d9afe0d3SWalker Chen - dma-names 74*d9afe0d3SWalker Chen - "#sound-dai-cells" 75*d9afe0d3SWalker Chen 76*d9afe0d3SWalker ChenadditionalProperties: false 77*d9afe0d3SWalker Chen 78*d9afe0d3SWalker Chenexamples: 79*d9afe0d3SWalker Chen - | 80*d9afe0d3SWalker Chen tdm@10090000 { 81*d9afe0d3SWalker Chen compatible = "starfive,jh7110-tdm"; 82*d9afe0d3SWalker Chen reg = <0x10090000 0x1000>; 83*d9afe0d3SWalker Chen clocks = <&syscrg 184>, 84*d9afe0d3SWalker Chen <&syscrg 185>, 85*d9afe0d3SWalker Chen <&syscrg 186>, 86*d9afe0d3SWalker Chen <&syscrg 187>, 87*d9afe0d3SWalker Chen <&syscrg 17>, 88*d9afe0d3SWalker Chen <&tdm_ext>; 89*d9afe0d3SWalker Chen clock-names = "tdm_ahb", "tdm_apb", 90*d9afe0d3SWalker Chen "tdm_internal", "tdm", 91*d9afe0d3SWalker Chen "mclk_inner", "tdm_ext"; 92*d9afe0d3SWalker Chen resets = <&syscrg 105>, 93*d9afe0d3SWalker Chen <&syscrg 107>, 94*d9afe0d3SWalker Chen <&syscrg 106>; 95*d9afe0d3SWalker Chen dmas = <&dma 20>, <&dma 21>; 96*d9afe0d3SWalker Chen dma-names = "rx","tx"; 97*d9afe0d3SWalker Chen #sound-dai-cells = <0>; 98*d9afe0d3SWalker Chen }; 99