1*af4c0b95SOder Chiou# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 2*af4c0b95SOder Chiou%YAML 1.2 3*af4c0b95SOder Chiou--- 4*af4c0b95SOder Chiou$id: http://devicetree.org/schemas/sound/realtek,rt5575.yaml# 5*af4c0b95SOder Chiou$schema: http://devicetree.org/meta-schemas/core.yaml# 6*af4c0b95SOder Chiou 7*af4c0b95SOder Chioutitle: ALC5575 audio CODEC 8*af4c0b95SOder Chiou 9*af4c0b95SOder Chioumaintainers: 10*af4c0b95SOder Chiou - Oder Chiou <oder_chiou@realtek.com> 11*af4c0b95SOder Chiou 12*af4c0b95SOder Chioudescription: 13*af4c0b95SOder Chiou The device supports both I2C and SPI. I2C is mandatory, while SPI is 14*af4c0b95SOder Chiou optional depending on the hardware configuration. SPI is used for 15*af4c0b95SOder Chiou firmware loading if present. 16*af4c0b95SOder Chiou 17*af4c0b95SOder ChiouallOf: 18*af4c0b95SOder Chiou - $ref: dai-common.yaml# 19*af4c0b95SOder Chiou 20*af4c0b95SOder Chiouproperties: 21*af4c0b95SOder Chiou compatible: 22*af4c0b95SOder Chiou const: realtek,rt5575 23*af4c0b95SOder Chiou 24*af4c0b95SOder Chiou reg: 25*af4c0b95SOder Chiou maxItems: 1 26*af4c0b95SOder Chiou 27*af4c0b95SOder Chiou spi-parent: 28*af4c0b95SOder Chiou description: 29*af4c0b95SOder Chiou Optional phandle reference to the SPI controller used for firmware 30*af4c0b95SOder Chiou loading. The argument specifies the chip select. 31*af4c0b95SOder Chiou $ref: /schemas/types.yaml#/definitions/phandle-array 32*af4c0b95SOder Chiou 33*af4c0b95SOder Chiourequired: 34*af4c0b95SOder Chiou - compatible 35*af4c0b95SOder Chiou - reg 36*af4c0b95SOder Chiou 37*af4c0b95SOder ChiouunevaluatedProperties: false 38*af4c0b95SOder Chiou 39*af4c0b95SOder Chiouexamples: 40*af4c0b95SOder Chiou # I2C-only node 41*af4c0b95SOder Chiou - | 42*af4c0b95SOder Chiou i2c { 43*af4c0b95SOder Chiou #address-cells = <1>; 44*af4c0b95SOder Chiou #size-cells = <0>; 45*af4c0b95SOder Chiou codec@57 { 46*af4c0b95SOder Chiou compatible = "realtek,rt5575"; 47*af4c0b95SOder Chiou reg = <0x57>; 48*af4c0b95SOder Chiou }; 49*af4c0b95SOder Chiou }; 50*af4c0b95SOder Chiou 51*af4c0b95SOder Chiou # I2C + optional SPI node 52*af4c0b95SOder Chiou - | 53*af4c0b95SOder Chiou i2c { 54*af4c0b95SOder Chiou #address-cells = <1>; 55*af4c0b95SOder Chiou #size-cells = <0>; 56*af4c0b95SOder Chiou codec@57 { 57*af4c0b95SOder Chiou compatible = "realtek,rt5575"; 58*af4c0b95SOder Chiou reg = <0x57>; 59*af4c0b95SOder Chiou spi-parent = <&spi0 0>; /* chip-select 0 */ 60*af4c0b95SOder Chiou }; 61*af4c0b95SOder Chiou }; 62