1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/sound/qcom,wcd937x-sdw.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm SoundWire Slave devices on WCD9370/WCD9375 8 9maintainers: 10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org> 11 12description: | 13 Qualcomm WCD9370/WCD9375 Codec is a standalone Hi-Fi audio codec IC. 14 It has RX and TX Soundwire slave devices. This bindings is for the 15 slave devices. 16 17properties: 18 compatible: 19 const: sdw20217010a00 20 21 reg: 22 maxItems: 1 23 24 qcom,tx-port-mapping: 25 description: | 26 Specifies static port mapping between device and host tx ports. 27 In the order of the device port index which are adc1_port, adc23_port, 28 dmic03_mbhc_port, dmic46_port. 29 Supports maximum 4 tx soundwire ports. 30 31 WCD9370 TX Port 1 (ADC1) <=> SWR2 Port 2 32 WCD9370 TX Port 2 (ADC2, 3) <=> SWR2 Port 2 33 WCD9370 TX Port 3 (DMIC0,1,2,3 & MBHC) <=> SWR2 Port 3 34 WCD9370 TX Port 4 (DMIC4,5,6,7) <=> SWR2 Port 4 35 36 $ref: /schemas/types.yaml#/definitions/uint32-array 37 minItems: 4 38 maxItems: 4 39 items: 40 enum: [1, 2, 3, 4] 41 42 qcom,rx-port-mapping: 43 description: | 44 Specifies static port mapping between device and host rx ports. 45 In the order of device port index which are hph_port, clsh_port, 46 comp_port, lo_port, dsd port. 47 Supports maximum 5 rx soundwire ports. 48 49 WCD9370 RX Port 1 (HPH_L/R) <==> SWR1 Port 1 (HPH_L/R) 50 WCD9370 RX Port 2 (CLSH) <==> SWR1 Port 2 (CLSH) 51 WCD9370 RX Port 3 (COMP_L/R) <==> SWR1 Port 3 (COMP_L/R) 52 WCD9370 RX Port 4 (LO) <==> SWR1 Port 4 (LO) 53 WCD9370 RX Port 5 (DSD_L/R) <==> SWR1 Port 5 (DSD) 54 55 $ref: /schemas/types.yaml#/definitions/uint32-array 56 minItems: 5 57 maxItems: 5 58 items: 59 enum: [1, 2, 3, 4, 5] 60 61required: 62 - compatible 63 - reg 64 65additionalProperties: false 66 67examples: 68 - | 69 soundwire@3210000 { 70 reg = <0x03210000 0x2000>; 71 #address-cells = <2>; 72 #size-cells = <0>; 73 wcd937x_rx: codec@0,4 { 74 compatible = "sdw20217010a00"; 75 reg = <0 4>; 76 qcom,rx-port-mapping = <1 2 3 4 5>; 77 }; 78 }; 79 80 soundwire@3230000 { 81 reg = <0x03230000 0x2000>; 82 #address-cells = <2>; 83 #size-cells = <0>; 84 wcd937x_tx: codec@0,3 { 85 compatible = "sdw20217010a00"; 86 reg = <0 3>; 87 qcom,tx-port-mapping = <2 2 3 4>; 88 }; 89 }; 90 91... 92