1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/sound/nvidia,tegra30-hda.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: NVIDIA Tegra HDA controller 8 9description: | 10 The High Definition Audio (HDA) block provides a serial interface to 11 audio codec. It supports multiple input and output streams. 12 13maintainers: 14 - Thierry Reding <treding@nvidia.com> 15 - Jon Hunter <jonathanh@nvidia.com> 16 17properties: 18 $nodename: 19 pattern: "^hda@[0-9a-f]*$" 20 21 compatible: 22 oneOf: 23 - enum: 24 - nvidia,tegra30-hda 25 - nvidia,tegra194-hda 26 - nvidia,tegra234-hda 27 - nvidia,tegra264-hda 28 - items: 29 - enum: 30 - nvidia,tegra186-hda 31 - nvidia,tegra210-hda 32 - nvidia,tegra124-hda 33 - nvidia,tegra114-hda 34 - const: nvidia,tegra30-hda 35 - items: 36 - const: nvidia,tegra132-hda 37 - const: nvidia,tegra124-hda 38 - const: nvidia,tegra30-hda 39 40 reg: 41 maxItems: 1 42 43 interrupts: 44 description: The interrupt from the HDA controller 45 maxItems: 1 46 47 clocks: 48 minItems: 1 49 maxItems: 3 50 51 clock-names: 52 minItems: 1 53 maxItems: 3 54 55 resets: 56 minItems: 2 57 maxItems: 3 58 59 reset-names: 60 minItems: 2 61 maxItems: 3 62 63 power-domains: 64 maxItems: 1 65 66 interconnects: 67 maxItems: 2 68 69 interconnect-names: 70 items: 71 - const: dma-mem 72 - const: write 73 74 iommus: 75 maxItems: 1 76 77 nvidia,model: 78 $ref: /schemas/types.yaml#/definitions/string 79 description: | 80 The user-visible name of this sound complex. If this property is 81 not specified then boards can use default name provided in hda driver. 82 83required: 84 - compatible 85 - reg 86 - interrupts 87 - clocks 88 - clock-names 89 90additionalProperties: false 91 92allOf: 93 - if: 94 properties: 95 compatible: 96 contains: 97 enum: 98 - nvidia,tegra30-hda 99 then: 100 properties: 101 clocks: 102 minItems: 3 103 clock-names: 104 items: 105 - const: hda 106 - const: hda2hdmi 107 - const: hda2codec_2x 108 resets: 109 minItems: 3 110 reset-names: 111 items: 112 - const: hda 113 - const: hda2hdmi 114 - const: hda2codec_2x 115 - if: 116 properties: 117 compatible: 118 contains: 119 enum: 120 - nvidia,tegra194-hda 121 then: 122 properties: 123 clocks: 124 minItems: 3 125 clock-names: 126 items: 127 - const: hda 128 - const: hda2hdmi 129 - const: hda2codec_2x 130 resets: 131 maxItems: 2 132 reset-names: 133 items: 134 - const: hda 135 - const: hda2hdmi 136 - if: 137 properties: 138 compatible: 139 contains: 140 enum: 141 - nvidia,tegra234-hda 142 then: 143 properties: 144 clocks: 145 minItems: 2 146 maxItems: 2 147 clock-names: 148 items: 149 - const: hda 150 - const: hda2codec_2x 151 resets: 152 maxItems: 2 153 reset-names: 154 items: 155 - const: hda 156 - const: hda2codec_2x 157 - if: 158 properties: 159 compatible: 160 contains: 161 enum: 162 - nvidia,tegra264-hda 163 then: 164 properties: 165 clocks: 166 maxItems: 1 167 clock-names: 168 items: 169 - const: hda 170 resets: 171 maxItems: 2 172 reset-names: 173 items: 174 - const: hda 175 - const: hda2codec_2x 176 power-domains: false 177 178examples: 179 - | 180 #include<dt-bindings/clock/tegra124-car-common.h> 181 #include<dt-bindings/interrupt-controller/arm-gic.h> 182 183 hda@70030000 { 184 compatible = "nvidia,tegra124-hda", "nvidia,tegra30-hda"; 185 reg = <0x70030000 0x10000>; 186 interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; 187 clocks = <&tegra_car TEGRA124_CLK_HDA>, 188 <&tegra_car TEGRA124_CLK_HDA2HDMI>, 189 <&tegra_car TEGRA124_CLK_HDA2CODEC_2X>; 190 clock-names = "hda", "hda2hdmi", "hda2codec_2x"; 191 resets = <&tegra_car 125>, /* hda */ 192 <&tegra_car 128>, /* hda2hdmi */ 193 <&tegra_car 111>; /* hda2codec_2x */ 194 reset-names = "hda", "hda2hdmi", "hda2codec_2x"; 195 nvidia,model = "jetson-tk1-hda"; 196 }; 197 198... 199