1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/sound/nvidia,tegra30-hda.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: NVIDIA Tegra HDA controller 8 9description: | 10 The High Definition Audio (HDA) block provides a serial interface to 11 audio codec. It supports multiple input and output streams. 12 13maintainers: 14 - Thierry Reding <treding@nvidia.com> 15 - Jon Hunter <jonathanh@nvidia.com> 16 17properties: 18 $nodename: 19 pattern: "^hda@[0-9a-f]*$" 20 21 compatible: 22 oneOf: 23 - const: nvidia,tegra30-hda 24 - items: 25 - enum: 26 - nvidia,tegra234-hda 27 - nvidia,tegra194-hda 28 - nvidia,tegra186-hda 29 - nvidia,tegra210-hda 30 - nvidia,tegra124-hda 31 - nvidia,tegra114-hda 32 - const: nvidia,tegra30-hda 33 - items: 34 - const: nvidia,tegra132-hda 35 - const: nvidia,tegra124-hda 36 - const: nvidia,tegra30-hda 37 38 reg: 39 maxItems: 1 40 41 interrupts: 42 description: The interrupt from the HDA controller 43 maxItems: 1 44 45 clocks: 46 minItems: 2 47 maxItems: 3 48 49 clock-names: 50 minItems: 2 51 items: 52 - const: hda 53 - const: hda2hdmi 54 - const: hda2codec_2x 55 56 resets: 57 minItems: 2 58 maxItems: 3 59 60 reset-names: 61 minItems: 2 62 items: 63 - const: hda 64 - const: hda2hdmi 65 - const: hda2codec_2x 66 67 power-domains: 68 maxItems: 1 69 70 interconnects: 71 maxItems: 2 72 73 interconnect-names: 74 items: 75 - const: dma-mem 76 - const: write 77 78 iommus: 79 maxItems: 1 80 81 nvidia,model: 82 $ref: /schemas/types.yaml#/definitions/string 83 description: | 84 The user-visible name of this sound complex. If this property is 85 not specified then boards can use default name provided in hda driver. 86 87required: 88 - compatible 89 - reg 90 - interrupts 91 - clocks 92 - clock-names 93 94additionalProperties: false 95 96examples: 97 - | 98 #include<dt-bindings/clock/tegra124-car-common.h> 99 #include<dt-bindings/interrupt-controller/arm-gic.h> 100 101 hda@70030000 { 102 compatible = "nvidia,tegra124-hda", "nvidia,tegra30-hda"; 103 reg = <0x70030000 0x10000>; 104 interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; 105 clocks = <&tegra_car TEGRA124_CLK_HDA>, 106 <&tegra_car TEGRA124_CLK_HDA2HDMI>, 107 <&tegra_car TEGRA124_CLK_HDA2CODEC_2X>; 108 clock-names = "hda", "hda2hdmi", "hda2codec_2x"; 109 resets = <&tegra_car 125>, /* hda */ 110 <&tegra_car 128>, /* hda2hdmi */ 111 <&tegra_car 111>; /* hda2codec_2x */ 112 reset-names = "hda", "hda2hdmi", "hda2codec_2x"; 113 nvidia,model = "jetson-tk1-hda"; 114 }; 115 116... 117