xref: /linux/Documentation/devicetree/bindings/sound/nvidia,tegra210-ahub.yaml (revision 9c39c6ffe0c2945c7cf814814c096bc23b63f53d) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/sound/nvidia,tegra210-ahub.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Tegra210 AHUB Device Tree Bindings
8
9description: |
10  The Audio Hub (AHUB) comprises a collection of hardware accelerators
11  for audio pre-processing, post-processing and a programmable full
12  crossbar for routing audio data across these accelerators. It has
13  external interfaces such as I2S, DMIC, DSPK. It interfaces with ADMA
14  engine through ADMAIF.
15
16maintainers:
17  - Jon Hunter <jonathanh@nvidia.com>
18  - Sameer Pujar <spujar@nvidia.com>
19
20allOf:
21  - $ref: audio-graph-port.yaml#
22
23properties:
24  $nodename:
25    pattern: "^ahub@[0-9a-f]*$"
26
27  compatible:
28    oneOf:
29      - enum:
30          - nvidia,tegra210-ahub
31          - nvidia,tegra186-ahub
32      - items:
33          - const: nvidia,tegra194-ahub
34          - const: nvidia,tegra186-ahub
35
36  reg:
37    maxItems: 1
38
39  clocks:
40    maxItems: 1
41
42  clock-names:
43    const: ahub
44
45  assigned-clocks:
46    maxItems: 1
47
48  assigned-clock-parents:
49    maxItems: 1
50
51  assigned-clock-rates:
52    maxItems: 1
53
54  "#address-cells":
55    const: 1
56
57  "#size-cells":
58    const: 1
59
60  ranges: true
61
62  ports:
63    description: |
64      Contains list of ACIF (Audio CIF) port nodes for AHUB (Audio Hub).
65      These are connected to ACIF interfaces of AHUB clients. Thus the
66      number of port nodes depend on the number of clients that AHUB may
67      have depending on the SoC revision.
68
69required:
70  - compatible
71  - reg
72  - clocks
73  - clock-names
74  - assigned-clocks
75  - assigned-clock-parents
76  - "#address-cells"
77  - "#size-cells"
78  - ranges
79
80unevaluatedProperties: false
81
82examples:
83  - |
84    #include<dt-bindings/clock/tegra210-car.h>
85
86    ahub@702d0800 {
87        compatible = "nvidia,tegra210-ahub";
88        reg = <0x702d0800 0x800>;
89        clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>;
90        clock-names = "ahub";
91        assigned-clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>;
92        assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
93        #address-cells = <1>;
94        #size-cells = <1>;
95        ranges = <0x702d0000 0x702d0000 0x0000e400>;
96
97        // All AHUB child nodes below
98        admaif@702d0000 {
99            compatible = "nvidia,tegra210-admaif";
100            reg = <0x702d0000 0x800>;
101            dmas = <&adma 1>,  <&adma 1>,
102               <&adma 2>,  <&adma 2>,
103               <&adma 3>,  <&adma 3>,
104               <&adma 4>,  <&adma 4>,
105               <&adma 5>,  <&adma 5>,
106               <&adma 6>,  <&adma 6>,
107               <&adma 7>,  <&adma 7>,
108               <&adma 8>,  <&adma 8>,
109               <&adma 9>,  <&adma 9>,
110               <&adma 10>, <&adma 10>;
111            dma-names = "rx1",  "tx1",
112                    "rx2",  "tx2",
113                    "rx3",  "tx3",
114                    "rx4",  "tx4",
115                    "rx5",  "tx5",
116                    "rx6",  "tx6",
117                    "rx7",  "tx7",
118                    "rx8",  "tx8",
119                    "rx9",  "tx9",
120                    "rx10", "tx10";
121        };
122
123        i2s@702d1000 {
124            compatible = "nvidia,tegra210-i2s";
125            reg = <0x702d1000 0x100>;
126            clocks = <&tegra_car TEGRA210_CLK_I2S0>;
127            clock-names = "i2s";
128            assigned-clocks = <&tegra_car TEGRA210_CLK_I2S0>;
129            assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
130            assigned-clock-rates = <1536000>;
131            sound-name-prefix = "I2S1";
132        };
133
134        dmic@702d4000 {
135            compatible = "nvidia,tegra210-dmic";
136            reg = <0x702d4000 0x100>;
137            clocks = <&tegra_car TEGRA210_CLK_DMIC1>;
138            clock-names = "dmic";
139            assigned-clocks = <&tegra_car TEGRA210_CLK_DMIC1>;
140            assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
141            assigned-clock-rates = <3072000>;
142            sound-name-prefix = "DMIC1";
143        };
144
145        // More child nodes to follow
146    };
147
148...
149