146f01611SDmitry Osipenko# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 246f01611SDmitry Osipenko%YAML 1.2 346f01611SDmitry Osipenko--- 446f01611SDmitry Osipenko$id: http://devicetree.org/schemas/sound/nvidia,tegra20-spdif.yaml# 546f01611SDmitry Osipenko$schema: http://devicetree.org/meta-schemas/core.yaml# 646f01611SDmitry Osipenko 746f01611SDmitry Osipenkotitle: NVIDIA Tegra20 S/PDIF Controller 846f01611SDmitry Osipenko 946f01611SDmitry Osipenkodescription: | 1046f01611SDmitry Osipenko The S/PDIF controller supports both input and output in serial audio 1146f01611SDmitry Osipenko digital interface format. The input controller can digitally recover 1246f01611SDmitry Osipenko a clock from the received stream. The S/PDIF controller is also used 1346f01611SDmitry Osipenko to generate the embedded audio for HDMI output channel. 1446f01611SDmitry Osipenko 1546f01611SDmitry Osipenkomaintainers: 1646f01611SDmitry Osipenko - Thierry Reding <treding@nvidia.com> 1746f01611SDmitry Osipenko - Jon Hunter <jonathanh@nvidia.com> 1846f01611SDmitry Osipenko 19*58ae9a2aSKrzysztof KozlowskiallOf: 20*58ae9a2aSKrzysztof Kozlowski - $ref: dai-common.yaml# 21*58ae9a2aSKrzysztof Kozlowski 2246f01611SDmitry Osipenkoproperties: 2346f01611SDmitry Osipenko compatible: 2446f01611SDmitry Osipenko const: nvidia,tegra20-spdif 2546f01611SDmitry Osipenko 2646f01611SDmitry Osipenko reg: 2746f01611SDmitry Osipenko maxItems: 1 2846f01611SDmitry Osipenko 2946f01611SDmitry Osipenko resets: 3046f01611SDmitry Osipenko maxItems: 1 3146f01611SDmitry Osipenko 3246f01611SDmitry Osipenko interrupts: 3346f01611SDmitry Osipenko maxItems: 1 3446f01611SDmitry Osipenko 3546f01611SDmitry Osipenko clocks: 3646f01611SDmitry Osipenko minItems: 2 3746f01611SDmitry Osipenko 3846f01611SDmitry Osipenko clock-names: 3946f01611SDmitry Osipenko items: 4046f01611SDmitry Osipenko - const: out 4146f01611SDmitry Osipenko - const: in 4246f01611SDmitry Osipenko 4346f01611SDmitry Osipenko dmas: 4446f01611SDmitry Osipenko minItems: 2 4546f01611SDmitry Osipenko 4646f01611SDmitry Osipenko dma-names: 4746f01611SDmitry Osipenko items: 4846f01611SDmitry Osipenko - const: rx 4946f01611SDmitry Osipenko - const: tx 5046f01611SDmitry Osipenko 5146f01611SDmitry Osipenko "#sound-dai-cells": 5246f01611SDmitry Osipenko const: 0 5346f01611SDmitry Osipenko 5446f01611SDmitry Osipenko nvidia,fixed-parent-rate: 5546f01611SDmitry Osipenko description: | 5646f01611SDmitry Osipenko Specifies whether board prefers parent clock to stay at a fixed rate. 5746f01611SDmitry Osipenko This allows multiple Tegra20 audio components work simultaneously by 5846f01611SDmitry Osipenko limiting number of supportable audio rates. 5946f01611SDmitry Osipenko type: boolean 6046f01611SDmitry Osipenko 6146f01611SDmitry Osipenkorequired: 6246f01611SDmitry Osipenko - compatible 6346f01611SDmitry Osipenko - reg 6446f01611SDmitry Osipenko - resets 6546f01611SDmitry Osipenko - interrupts 6646f01611SDmitry Osipenko - clocks 6746f01611SDmitry Osipenko - clock-names 6846f01611SDmitry Osipenko - dmas 6946f01611SDmitry Osipenko - dma-names 7046f01611SDmitry Osipenko - "#sound-dai-cells" 7146f01611SDmitry Osipenko 72*58ae9a2aSKrzysztof KozlowskiunevaluatedProperties: false 7346f01611SDmitry Osipenko 7446f01611SDmitry Osipenkoexamples: 7546f01611SDmitry Osipenko - | 7646f01611SDmitry Osipenko spdif@70002400 { 7746f01611SDmitry Osipenko compatible = "nvidia,tegra20-spdif"; 7846f01611SDmitry Osipenko reg = <0x70002400 0x200>; 7946f01611SDmitry Osipenko interrupts = <77>; 8046f01611SDmitry Osipenko clocks = <&clk 99>, <&clk 98>; 8146f01611SDmitry Osipenko clock-names = "out", "in"; 8246f01611SDmitry Osipenko resets = <&rst 10>; 8346f01611SDmitry Osipenko dmas = <&apbdma 3>, <&apbdma 3>; 8446f01611SDmitry Osipenko dma-names = "rx", "tx"; 8546f01611SDmitry Osipenko #sound-dai-cells = <0>; 8646f01611SDmitry Osipenko }; 8746f01611SDmitry Osipenko 8846f01611SDmitry Osipenko... 89