xref: /linux/Documentation/devicetree/bindings/sound/nvidia,tegra20-ac97.yaml (revision daa121128a2d2ac6006159e2c47676e4fcd21eab) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/sound/nvidia,tegra20-ac97.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: NVIDIA Tegra20 AC97 controller
8
9maintainers:
10  - Thierry Reding <treding@nvidia.com>
11  - Jon Hunter <jonathanh@nvidia.com>
12
13properties:
14  compatible:
15    const: nvidia,tegra20-ac97
16
17  reg:
18    maxItems: 1
19
20  resets:
21    maxItems: 1
22
23  reset-names:
24    const: ac97
25
26  interrupts:
27    maxItems: 1
28
29  clocks:
30    maxItems: 1
31
32  dmas:
33    maxItems: 2
34
35  dma-names:
36    items:
37      - const: rx
38      - const: tx
39
40  nvidia,codec-reset-gpios:
41    description: Reset pin of external AC97 codec
42    maxItems: 1
43
44  nvidia,codec-sync-gpios:
45    description: AC97 DAP _FS line
46    maxItems: 1
47
48required:
49  - compatible
50  - reg
51  - resets
52  - reset-names
53  - interrupts
54  - clocks
55  - dmas
56  - dma-names
57  - nvidia,codec-reset-gpios
58  - nvidia,codec-sync-gpios
59
60additionalProperties: false
61
62examples:
63  - |
64    #include <dt-bindings/clock/tegra20-car.h>
65    #include <dt-bindings/gpio/tegra-gpio.h>
66    #include <dt-bindings/interrupt-controller/arm-gic.h>
67    #include <dt-bindings/interrupt-controller/irq.h>
68    #include <dt-bindings/gpio/gpio.h>
69
70    ac97@70002000 {
71        compatible = "nvidia,tegra20-ac97";
72        reg = <0x70002000 0x200>;
73        resets = <&tegra_car 3>;
74        reset-names = "ac97";
75        interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
76        clocks = <&tegra_car 3>;
77        dmas = <&apbdma 12>, <&apbdma 12>;
78        dma-names = "rx", "tx";
79        nvidia,codec-reset-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
80        nvidia,codec-sync-gpios = <&gpio TEGRA_GPIO(P, 0) GPIO_ACTIVE_HIGH>;
81    };
82...
83