1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/sound/nvidia,tegra186-dspk.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Tegra186 DSPK Controller 8 9description: | 10 The Digital Speaker Controller (DSPK) can be viewed as a Pulse 11 Density Modulation (PDM) transmitter that up-samples the input to 12 the desired sampling rate by interpolation and then converts the 13 over sampled Pulse Code Modulation (PCM) input to the desired 1-bit 14 output via Delta Sigma Modulation (DSM). 15 16maintainers: 17 - Jon Hunter <jonathanh@nvidia.com> 18 - Sameer Pujar <spujar@nvidia.com> 19 20allOf: 21 - $ref: dai-common.yaml# 22 23properties: 24 $nodename: 25 pattern: "^dspk@[0-9a-f]*$" 26 27 compatible: 28 oneOf: 29 - const: nvidia,tegra186-dspk 30 - items: 31 - enum: 32 - nvidia,tegra264-dspk 33 - nvidia,tegra234-dspk 34 - nvidia,tegra194-dspk 35 - const: nvidia,tegra186-dspk 36 37 reg: 38 maxItems: 1 39 40 clocks: 41 maxItems: 1 42 43 clock-names: 44 const: dspk 45 46 assigned-clocks: 47 maxItems: 1 48 49 assigned-clock-parents: 50 maxItems: 1 51 52 assigned-clock-rates: 53 maxItems: 1 54 55 sound-name-prefix: 56 pattern: "^DSPK[1-9]$" 57 58 ports: 59 $ref: /schemas/graph.yaml#/properties/ports 60 properties: 61 port@0: 62 $ref: audio-graph-port.yaml# 63 unevaluatedProperties: false 64 description: | 65 DSPK ACIF (Audio Client Interface) port connected to the 66 corresponding AHUB (Audio Hub) ACIF port. 67 68 port@1: 69 $ref: audio-graph-port.yaml# 70 unevaluatedProperties: false 71 description: | 72 DSPK DAP (Digital Audio Port) interface which can be connected 73 to external audio codec for playback. 74 75required: 76 - compatible 77 - reg 78 - clocks 79 - clock-names 80 - assigned-clocks 81 - assigned-clock-parents 82 - sound-name-prefix 83 84additionalProperties: false 85 86examples: 87 - | 88 #include<dt-bindings/clock/tegra186-clock.h> 89 90 dspk@2905000 { 91 compatible = "nvidia,tegra186-dspk"; 92 reg = <0x2905000 0x100>; 93 clocks = <&bpmp TEGRA186_CLK_DSPK1>; 94 clock-names = "dspk"; 95 assigned-clocks = <&bpmp TEGRA186_CLK_DSPK1>; 96 assigned-clock-parents = <&bpmp TEGRA186_CLK_PLL_A_OUT0>; 97 assigned-clock-rates = <12288000>; 98 sound-name-prefix = "DSPK1"; 99 }; 100 101... 102