xref: /linux/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-graph-card.yaml (revision 172cdcaefea5c297fdb3d20b7d5aff60ae4fbce6) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/sound/nvidia,tegra-audio-graph-card.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Audio Graph based Tegra sound card driver
8
9description: |
10  This is based on generic audio graph card driver along with additional
11  customizations for Tegra platforms. It uses the same bindings with
12  additional standard clock DT bindings required for Tegra.
13
14maintainers:
15  - Jon Hunter <jonathanh@nvidia.com>
16  - Sameer Pujar <spujar@nvidia.com>
17
18allOf:
19  - $ref: audio-graph.yaml#
20
21properties:
22  compatible:
23    enum:
24      - nvidia,tegra210-audio-graph-card
25      - nvidia,tegra186-audio-graph-card
26
27  clocks:
28    minItems: 2
29
30  clock-names:
31    minItems: 2
32    items:
33      - const: pll_a
34      - const: plla_out0
35
36  assigned-clocks:
37    minItems: 1
38    maxItems: 3
39
40  assigned-clock-parents:
41    minItems: 1
42    maxItems: 3
43
44  assigned-clock-rates:
45    minItems: 1
46    maxItems: 3
47
48  iommus:
49    maxItems: 1
50
51required:
52  - clocks
53  - clock-names
54  - assigned-clocks
55  - assigned-clock-parents
56
57unevaluatedProperties: false
58
59examples:
60  - |
61    #include<dt-bindings/clock/tegra210-car.h>
62
63    tegra_sound {
64        compatible = "nvidia,tegra210-audio-graph-card";
65
66        clocks = <&tegra_car TEGRA210_CLK_PLL_A>,
67                 <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
68        clock-names = "pll_a", "plla_out0";
69
70        assigned-clocks = <&tegra_car TEGRA210_CLK_PLL_A>,
71                          <&tegra_car TEGRA210_CLK_PLL_A_OUT0>,
72                          <&tegra_car TEGRA210_CLK_EXTERN1>;
73        assigned-clock-parents = <0>, <0>, <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
74        assigned-clock-rates = <368640000>, <49152000>, <12288000>;
75
76        dais = /* FE */
77               <&admaif1_port>,
78               /* Router */
79               <&xbar_i2s1_port>,
80               /* I/O DAP Ports */
81               <&i2s1_port>;
82
83        label = "jetson-tx1-ape";
84    };
85
86    // The ports are defined for AHUB and its child devices.
87    ahub@702d0800 {
88        compatible = "nvidia,tegra210-ahub";
89        reg = <0x702d0800 0x800>;
90        clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>;
91        clock-names = "ahub";
92        assigned-clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>;
93        assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
94        #address-cells = <1>;
95        #size-cells = <1>;
96        ranges = <0x702d0000 0x702d0000 0x0000e400>;
97
98        ports {
99            #address-cells = <1>;
100            #size-cells = <0>;
101
102            port@0 {
103                reg = <0x0>;
104                xbar_admaif1_ep: endpoint {
105                    remote-endpoint = <&admaif1_ep>;
106                };
107            };
108
109            // ...
110
111            xbar_i2s1_port: port@a {
112                reg = <0xa>;
113                xbar_i2s1_ep: endpoint {
114                    remote-endpoint = <&i2s1_cif_ep>;
115                };
116            };
117        };
118
119        admaif@702d0000 {
120            compatible = "nvidia,tegra210-admaif";
121            reg = <0x702d0000 0x800>;
122            dmas = <&adma 1>,  <&adma 1>,
123                   <&adma 2>,  <&adma 2>,
124                   <&adma 3>,  <&adma 3>,
125                   <&adma 4>,  <&adma 4>,
126                   <&adma 5>,  <&adma 5>,
127                   <&adma 6>,  <&adma 6>,
128                   <&adma 7>,  <&adma 7>,
129                   <&adma 8>,  <&adma 8>,
130                   <&adma 9>,  <&adma 9>,
131                   <&adma 10>, <&adma 10>;
132            dma-names = "rx1",  "tx1",
133                        "rx2",  "tx2",
134                        "rx3",  "tx3",
135                        "rx4",  "tx4",
136                        "rx5",  "tx5",
137                        "rx6",  "tx6",
138                        "rx7",  "tx7",
139                        "rx8",  "tx8",
140                        "rx9",  "tx9",
141                        "rx10", "tx10";
142
143            ports {
144                #address-cells = <1>;
145                #size-cells = <0>;
146
147                admaif1_port: port@0 {
148                    reg = <0x0>;
149                    admaif1_ep: endpoint {
150                        remote-endpoint = <&xbar_admaif1_ep>;
151                    };
152                };
153
154                // More ADMAIF ports to follow
155            };
156        };
157
158        i2s@702d1000 {
159            compatible = "nvidia,tegra210-i2s";
160            clocks = <&tegra_car TEGRA210_CLK_I2S0>;
161            clock-names = "i2s";
162            assigned-clocks = <&tegra_car TEGRA210_CLK_I2S0>;
163            assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
164            assigned-clock-rates = <1536000>;
165            reg = <0x702d1000 0x100>;
166
167            ports {
168                #address-cells = <1>;
169                #size-cells = <0>;
170
171                port@0 {
172                    reg = <0x0>;
173
174                    i2s1_cif_ep: endpoint {
175                        remote-endpoint = <&xbar_i2s1_ep>;
176                    };
177                };
178
179                i2s1_port: port@1 {
180                    reg = <0x1>;
181
182                    i2s1_dap: endpoint {
183                        dai-format = "i2s";
184                    };
185                };
186            };
187        };
188    };
189
190...
191