1*d6b634cbSSvyatoslav Ryhel# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*d6b634cbSSvyatoslav Ryhel%YAML 1.2 3*d6b634cbSSvyatoslav Ryhel--- 4*d6b634cbSSvyatoslav Ryhel$id: http://devicetree.org/schemas/sound/nvidia,tegra-audio-cpcap.yaml# 5*d6b634cbSSvyatoslav Ryhel$schema: http://devicetree.org/meta-schemas/core.yaml# 6*d6b634cbSSvyatoslav Ryhel 7*d6b634cbSSvyatoslav Ryheltitle: NVIDIA Tegra audio complex with CPCAP CODEC 8*d6b634cbSSvyatoslav Ryhel 9*d6b634cbSSvyatoslav Ryhelmaintainers: 10*d6b634cbSSvyatoslav Ryhel - Svyatoslav Ryhel <clamor95@gmail.com> 11*d6b634cbSSvyatoslav Ryhel 12*d6b634cbSSvyatoslav RyhelallOf: 13*d6b634cbSSvyatoslav Ryhel - $ref: nvidia,tegra-audio-common.yaml# 14*d6b634cbSSvyatoslav Ryhel 15*d6b634cbSSvyatoslav Ryhelproperties: 16*d6b634cbSSvyatoslav Ryhel compatible: 17*d6b634cbSSvyatoslav Ryhel items: 18*d6b634cbSSvyatoslav Ryhel - pattern: '^motorola,tegra-audio-cpcap(-[a-z0-9]+)+$' 19*d6b634cbSSvyatoslav Ryhel - const: nvidia,tegra-audio-cpcap 20*d6b634cbSSvyatoslav Ryhel 21*d6b634cbSSvyatoslav Ryhel nvidia,audio-routing: 22*d6b634cbSSvyatoslav Ryhel $ref: /schemas/types.yaml#/definitions/non-unique-string-array 23*d6b634cbSSvyatoslav Ryhel description: 24*d6b634cbSSvyatoslav Ryhel A list of the connections between audio components. Each entry is a 25*d6b634cbSSvyatoslav Ryhel pair of strings, the first being the connection's sink, the second 26*d6b634cbSSvyatoslav Ryhel being the connection's source. Valid names for sources and sinks are 27*d6b634cbSSvyatoslav Ryhel the pins (documented in the binding document), and the jacks on the 28*d6b634cbSSvyatoslav Ryhel board. 29*d6b634cbSSvyatoslav Ryhel minItems: 2 30*d6b634cbSSvyatoslav Ryhel items: 31*d6b634cbSSvyatoslav Ryhel enum: 32*d6b634cbSSvyatoslav Ryhel # Board Connectors 33*d6b634cbSSvyatoslav Ryhel - Speakers 34*d6b634cbSSvyatoslav Ryhel - Int Spk 35*d6b634cbSSvyatoslav Ryhel - Earpiece 36*d6b634cbSSvyatoslav Ryhel - Int Mic 37*d6b634cbSSvyatoslav Ryhel - Headset Mic 38*d6b634cbSSvyatoslav Ryhel - Internal Mic 1 39*d6b634cbSSvyatoslav Ryhel - Internal Mic 2 40*d6b634cbSSvyatoslav Ryhel - Headphone 41*d6b634cbSSvyatoslav Ryhel - Headphones 42*d6b634cbSSvyatoslav Ryhel - Headphone Jack 43*d6b634cbSSvyatoslav Ryhel - Mic Jack 44*d6b634cbSSvyatoslav Ryhel 45*d6b634cbSSvyatoslav Ryhel # CODEC Pins 46*d6b634cbSSvyatoslav Ryhel - MICR 47*d6b634cbSSvyatoslav Ryhel - HSMIC 48*d6b634cbSSvyatoslav Ryhel - EMUMIC 49*d6b634cbSSvyatoslav Ryhel - MICL 50*d6b634cbSSvyatoslav Ryhel - EXTR 51*d6b634cbSSvyatoslav Ryhel - EXTL 52*d6b634cbSSvyatoslav Ryhel - EP 53*d6b634cbSSvyatoslav Ryhel - SPKR 54*d6b634cbSSvyatoslav Ryhel - SPKL 55*d6b634cbSSvyatoslav Ryhel - LINER 56*d6b634cbSSvyatoslav Ryhel - LINEL 57*d6b634cbSSvyatoslav Ryhel - HSR 58*d6b634cbSSvyatoslav Ryhel - HSL 59*d6b634cbSSvyatoslav Ryhel - EMUR 60*d6b634cbSSvyatoslav Ryhel - EMUL 61*d6b634cbSSvyatoslav Ryhel 62*d6b634cbSSvyatoslav RyhelunevaluatedProperties: false 63*d6b634cbSSvyatoslav Ryhel 64*d6b634cbSSvyatoslav Ryhelexamples: 65*d6b634cbSSvyatoslav Ryhel - | 66*d6b634cbSSvyatoslav Ryhel #include <dt-bindings/clock/tegra20-car.h> 67*d6b634cbSSvyatoslav Ryhel #include <dt-bindings/soc/tegra-pmc.h> 68*d6b634cbSSvyatoslav Ryhel sound { 69*d6b634cbSSvyatoslav Ryhel compatible = "motorola,tegra-audio-cpcap-olympus", 70*d6b634cbSSvyatoslav Ryhel "nvidia,tegra-audio-cpcap"; 71*d6b634cbSSvyatoslav Ryhel nvidia,model = "Motorola Atrix 4G (MB860) CPCAP"; 72*d6b634cbSSvyatoslav Ryhel 73*d6b634cbSSvyatoslav Ryhel nvidia,audio-routing = 74*d6b634cbSSvyatoslav Ryhel "Headphones", "HSR", 75*d6b634cbSSvyatoslav Ryhel "Headphones", "HSL", 76*d6b634cbSSvyatoslav Ryhel "Int Spk", "SPKR", 77*d6b634cbSSvyatoslav Ryhel "Int Spk", "SPKL", 78*d6b634cbSSvyatoslav Ryhel "Earpiece", "EP", 79*d6b634cbSSvyatoslav Ryhel "HSMIC", "Mic Jack", 80*d6b634cbSSvyatoslav Ryhel "MICR", "Internal Mic 1", 81*d6b634cbSSvyatoslav Ryhel "MICL", "Internal Mic 2"; 82*d6b634cbSSvyatoslav Ryhel 83*d6b634cbSSvyatoslav Ryhel nvidia,i2s-controller = <&tegra_i2s1>; 84*d6b634cbSSvyatoslav Ryhel nvidia,audio-codec = <&cpcap_audio>; 85*d6b634cbSSvyatoslav Ryhel 86*d6b634cbSSvyatoslav Ryhel clocks = <&tegra_car TEGRA20_CLK_PLL_A>, 87*d6b634cbSSvyatoslav Ryhel <&tegra_car TEGRA20_CLK_PLL_A_OUT0>, 88*d6b634cbSSvyatoslav Ryhel <&tegra_car TEGRA20_CLK_CDEV1>; 89*d6b634cbSSvyatoslav Ryhel clock-names = "pll_a", "pll_a_out0", "mclk"; 90*d6b634cbSSvyatoslav Ryhel }; 91