1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/sound/nvidia,tegra30-hda.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: NVIDIA Tegra HDA controller 8 9description: | 10 The High Definition Audio (HDA) block provides a serial interface to 11 audio codec. It supports multiple input and output streams. 12 13maintainers: 14 - Thierry Reding <treding@nvidia.com> 15 - Jon Hunter <jonathanh@nvidia.com> 16 17properties: 18 $nodename: 19 pattern: "^hda@[0-9a-f]*$" 20 21 compatible: 22 oneOf: 23 - const: nvidia,tegra30-hda 24 - items: 25 - enum: 26 - nvidia,tegra194-hda 27 - nvidia,tegra186-hda 28 - nvidia,tegra210-hda 29 - nvidia,tegra124-hda 30 - const: nvidia,tegra30-hda 31 - items: 32 - const: nvidia,tegra132-hda 33 - const: nvidia,tegra124-hda 34 - const: nvidia,tegra30-hda 35 36 reg: 37 maxItems: 1 38 39 interrupts: 40 description: The interrupt from the HDA controller 41 maxItems: 1 42 43 clocks: 44 maxItems: 3 45 46 clock-names: 47 items: 48 - const: hda 49 - const: hda2hdmi 50 - const: hda2codec_2x 51 52 resets: 53 minItems: 2 54 maxItems: 3 55 56 reset-names: 57 minItems: 2 58 items: 59 - const: hda 60 - const: hda2hdmi 61 - const: hda2codec_2x 62 63 power-domains: 64 maxItems: 1 65 66 interconnects: 67 maxItems: 2 68 69 interconnect-names: 70 items: 71 - const: dma-mem 72 - const: write 73 74 iommus: 75 maxItems: 1 76 77 nvidia,model: 78 $ref: /schemas/types.yaml#/definitions/string 79 description: | 80 The user-visible name of this sound complex. If this property is 81 not specified then boards can use default name provided in hda driver. 82 83required: 84 - compatible 85 - reg 86 - interrupts 87 - clocks 88 - clock-names 89 90additionalProperties: false 91 92examples: 93 - | 94 #include<dt-bindings/clock/tegra124-car-common.h> 95 #include<dt-bindings/interrupt-controller/arm-gic.h> 96 97 hda@70030000 { 98 compatible = "nvidia,tegra124-hda", "nvidia,tegra30-hda"; 99 reg = <0x70030000 0x10000>; 100 interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; 101 clocks = <&tegra_car TEGRA124_CLK_HDA>, 102 <&tegra_car TEGRA124_CLK_HDA2HDMI>, 103 <&tegra_car TEGRA124_CLK_HDA2CODEC_2X>; 104 clock-names = "hda", "hda2hdmi", "hda2codec_2x"; 105 resets = <&tegra_car 125>, /* hda */ 106 <&tegra_car 128>, /* hda2hdmi */ 107 <&tegra_car 111>; /* hda2codec_2x */ 108 reset-names = "hda", "hda2hdmi", "hda2codec_2x"; 109 nvidia,model = "jetson-tk1-hda"; 110 }; 111 112... 113