1*46f01611SDmitry Osipenko# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*46f01611SDmitry Osipenko%YAML 1.2 3*46f01611SDmitry Osipenko--- 4*46f01611SDmitry Osipenko$id: http://devicetree.org/schemas/sound/nvidia,tegra20-spdif.yaml# 5*46f01611SDmitry Osipenko$schema: http://devicetree.org/meta-schemas/core.yaml# 6*46f01611SDmitry Osipenko 7*46f01611SDmitry Osipenkotitle: NVIDIA Tegra20 S/PDIF Controller 8*46f01611SDmitry Osipenko 9*46f01611SDmitry Osipenkodescription: | 10*46f01611SDmitry Osipenko The S/PDIF controller supports both input and output in serial audio 11*46f01611SDmitry Osipenko digital interface format. The input controller can digitally recover 12*46f01611SDmitry Osipenko a clock from the received stream. The S/PDIF controller is also used 13*46f01611SDmitry Osipenko to generate the embedded audio for HDMI output channel. 14*46f01611SDmitry Osipenko 15*46f01611SDmitry Osipenkomaintainers: 16*46f01611SDmitry Osipenko - Thierry Reding <treding@nvidia.com> 17*46f01611SDmitry Osipenko - Jon Hunter <jonathanh@nvidia.com> 18*46f01611SDmitry Osipenko 19*46f01611SDmitry Osipenkoproperties: 20*46f01611SDmitry Osipenko compatible: 21*46f01611SDmitry Osipenko const: nvidia,tegra20-spdif 22*46f01611SDmitry Osipenko 23*46f01611SDmitry Osipenko reg: 24*46f01611SDmitry Osipenko maxItems: 1 25*46f01611SDmitry Osipenko 26*46f01611SDmitry Osipenko resets: 27*46f01611SDmitry Osipenko maxItems: 1 28*46f01611SDmitry Osipenko 29*46f01611SDmitry Osipenko interrupts: 30*46f01611SDmitry Osipenko maxItems: 1 31*46f01611SDmitry Osipenko 32*46f01611SDmitry Osipenko clocks: 33*46f01611SDmitry Osipenko minItems: 2 34*46f01611SDmitry Osipenko 35*46f01611SDmitry Osipenko clock-names: 36*46f01611SDmitry Osipenko items: 37*46f01611SDmitry Osipenko - const: out 38*46f01611SDmitry Osipenko - const: in 39*46f01611SDmitry Osipenko 40*46f01611SDmitry Osipenko dmas: 41*46f01611SDmitry Osipenko minItems: 2 42*46f01611SDmitry Osipenko 43*46f01611SDmitry Osipenko dma-names: 44*46f01611SDmitry Osipenko items: 45*46f01611SDmitry Osipenko - const: rx 46*46f01611SDmitry Osipenko - const: tx 47*46f01611SDmitry Osipenko 48*46f01611SDmitry Osipenko "#sound-dai-cells": 49*46f01611SDmitry Osipenko const: 0 50*46f01611SDmitry Osipenko 51*46f01611SDmitry Osipenko nvidia,fixed-parent-rate: 52*46f01611SDmitry Osipenko description: | 53*46f01611SDmitry Osipenko Specifies whether board prefers parent clock to stay at a fixed rate. 54*46f01611SDmitry Osipenko This allows multiple Tegra20 audio components work simultaneously by 55*46f01611SDmitry Osipenko limiting number of supportable audio rates. 56*46f01611SDmitry Osipenko type: boolean 57*46f01611SDmitry Osipenko 58*46f01611SDmitry Osipenkorequired: 59*46f01611SDmitry Osipenko - compatible 60*46f01611SDmitry Osipenko - reg 61*46f01611SDmitry Osipenko - resets 62*46f01611SDmitry Osipenko - interrupts 63*46f01611SDmitry Osipenko - clocks 64*46f01611SDmitry Osipenko - clock-names 65*46f01611SDmitry Osipenko - dmas 66*46f01611SDmitry Osipenko - dma-names 67*46f01611SDmitry Osipenko - "#sound-dai-cells" 68*46f01611SDmitry Osipenko 69*46f01611SDmitry OsipenkoadditionalProperties: false 70*46f01611SDmitry Osipenko 71*46f01611SDmitry Osipenkoexamples: 72*46f01611SDmitry Osipenko - | 73*46f01611SDmitry Osipenko spdif@70002400 { 74*46f01611SDmitry Osipenko compatible = "nvidia,tegra20-spdif"; 75*46f01611SDmitry Osipenko reg = <0x70002400 0x200>; 76*46f01611SDmitry Osipenko interrupts = <77>; 77*46f01611SDmitry Osipenko clocks = <&clk 99>, <&clk 98>; 78*46f01611SDmitry Osipenko clock-names = "out", "in"; 79*46f01611SDmitry Osipenko resets = <&rst 10>; 80*46f01611SDmitry Osipenko dmas = <&apbdma 3>, <&apbdma 3>; 81*46f01611SDmitry Osipenko dma-names = "rx", "tx"; 82*46f01611SDmitry Osipenko #sound-dai-cells = <0>; 83*46f01611SDmitry Osipenko }; 84*46f01611SDmitry Osipenko 85*46f01611SDmitry Osipenko... 86