xref: /linux/Documentation/devicetree/bindings/sound/mt8192-afe-pcm.yaml (revision da1d9caf95def6f0320819cf941c9fd1069ba9e1) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/sound/mt8192-afe-pcm.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Mediatek AFE PCM controller for mt8192
8
9maintainers:
10  - Jiaxin Yu <jiaxin.yu@mediatek.com>
11  - Shane Chien <shane.chien@mediatek.com>
12
13properties:
14  compatible:
15    const: mediatek,mt8192-audio
16
17  interrupts:
18    maxItems: 1
19
20  resets:
21    maxItems: 1
22
23  reset-names:
24    const: audiosys
25
26  mediatek,apmixedsys:
27    $ref: "/schemas/types.yaml#/definitions/phandle"
28    description: The phandle of the mediatek apmixedsys controller
29
30  mediatek,infracfg:
31    $ref: "/schemas/types.yaml#/definitions/phandle"
32    description: The phandle of the mediatek infracfg controller
33
34  mediatek,topckgen:
35    $ref: "/schemas/types.yaml#/definitions/phandle"
36    description: The phandle of the mediatek topckgen controller
37
38  power-domains:
39    maxItems: 1
40
41  clocks:
42    items:
43      - description: AFE clock
44      - description: ADDA DAC clock
45      - description: ADDA DAC pre-distortion clock
46      - description: audio infra sys clock
47      - description: audio infra 26M clock
48
49  clock-names:
50    items:
51      - const: aud_afe_clk
52      - const: aud_dac_clk
53      - const: aud_dac_predis_clk
54      - const: aud_infra_clk
55      - const: aud_infra_26m_clk
56
57required:
58  - compatible
59  - interrupts
60  - resets
61  - reset-names
62  - mediatek,apmixedsys
63  - mediatek,infracfg
64  - mediatek,topckgen
65  - power-domains
66  - clocks
67  - clock-names
68
69additionalProperties: false
70
71examples:
72  - |
73    #include <dt-bindings/clock/mt8192-clk.h>
74    #include <dt-bindings/interrupt-controller/arm-gic.h>
75    #include <dt-bindings/interrupt-controller/irq.h>
76    #include <dt-bindings/power/mt8192-power.h>
77    #include <dt-bindings/reset/mt8192-resets.h>
78
79    afe: mt8192-afe-pcm {
80        compatible = "mediatek,mt8192-audio";
81        interrupts = <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>;
82        resets = <&watchdog MT8192_TOPRGU_AUDIO_SW_RST>;
83        reset-names = "audiosys";
84        mediatek,apmixedsys = <&apmixedsys>;
85        mediatek,infracfg = <&infracfg>;
86        mediatek,topckgen = <&topckgen>;
87        power-domains = <&scpsys MT8192_POWER_DOMAIN_AUDIO>;
88        clocks = <&audsys CLK_AUD_AFE>,
89                 <&audsys CLK_AUD_DAC>,
90                 <&audsys CLK_AUD_DAC_PREDIS>,
91                 <&infracfg CLK_INFRA_AUDIO>,
92                 <&infracfg CLK_INFRA_AUDIO_26M_B>;
93        clock-names = "aud_afe_clk",
94                      "aud_dac_clk",
95                      "aud_dac_predis_clk",
96                      "aud_infra_clk",
97                      "aud_infra_26m_clk";
98    };
99
100...
101