1cfec0193SClaudiu Beznea# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2cfec0193SClaudiu Beznea%YAML 1.2 3cfec0193SClaudiu Beznea--- 4cfec0193SClaudiu Beznea$id: http://devicetree.org/schemas/sound/microchip,sama7g5-i2smcc.yaml# 5cfec0193SClaudiu Beznea$schema: http://devicetree.org/meta-schemas/core.yaml# 6cfec0193SClaudiu Beznea 7cfec0193SClaudiu Bezneatitle: Microchip I2S Multi-Channel Controller 8cfec0193SClaudiu Beznea 9cfec0193SClaudiu Bezneamaintainers: 10cfec0193SClaudiu Beznea - Codrin Ciubotariu <codrin.ciubotariu@microchip.com> 11cfec0193SClaudiu Beznea 12cfec0193SClaudiu Bezneadescription: 13cfec0193SClaudiu Beznea The I2SMCC complies with the Inter-IC Sound (I2S) bus specification and 14cfec0193SClaudiu Beznea supports a Time Division Multiplexed (TDM) interface with external 15cfec0193SClaudiu Beznea multi-channel audio codecs. It consists of a receiver, a transmitter and a 16cfec0193SClaudiu Beznea common clock generator that can be enabled separately to provide Adapter, 17cfec0193SClaudiu Beznea Client or Controller modes with receiver and/or transmitter active. 18cfec0193SClaudiu Beznea On later I2SMCC versions (starting with Microchip's SAMA7G5) I2S 19cfec0193SClaudiu Beznea multi-channel is supported by using multiple data pins, output and 20cfec0193SClaudiu Beznea input, without TDM. 21cfec0193SClaudiu Beznea 22cfec0193SClaudiu Bezneaproperties: 23cfec0193SClaudiu Beznea "#sound-dai-cells": 24cfec0193SClaudiu Beznea const: 0 25cfec0193SClaudiu Beznea 26cfec0193SClaudiu Beznea compatible: 27*c06a7a8eSVarshini Rajendran oneOf: 28*c06a7a8eSVarshini Rajendran - enum: 29cfec0193SClaudiu Beznea - microchip,sam9x60-i2smcc 30cfec0193SClaudiu Beznea - microchip,sama7g5-i2smcc 31*c06a7a8eSVarshini Rajendran - items: 32*c06a7a8eSVarshini Rajendran - enum: 33*c06a7a8eSVarshini Rajendran - microchip,sam9x7-i2smcc 34*c06a7a8eSVarshini Rajendran - const: microchip,sam9x60-i2smcc 35cfec0193SClaudiu Beznea 36cfec0193SClaudiu Beznea reg: 37cfec0193SClaudiu Beznea maxItems: 1 38cfec0193SClaudiu Beznea 39cfec0193SClaudiu Beznea interrupts: 40cfec0193SClaudiu Beznea maxItems: 1 41cfec0193SClaudiu Beznea 42cfec0193SClaudiu Beznea clocks: 43cfec0193SClaudiu Beznea items: 44cfec0193SClaudiu Beznea - description: Peripheral Bus Clock 45cfec0193SClaudiu Beznea - description: Generic Clock (Optional). Should be set mostly when Master 46cfec0193SClaudiu Beznea Mode is required. 47cfec0193SClaudiu Beznea minItems: 1 48cfec0193SClaudiu Beznea 49cfec0193SClaudiu Beznea clock-names: 50cfec0193SClaudiu Beznea items: 51cfec0193SClaudiu Beznea - const: pclk 52cfec0193SClaudiu Beznea - const: gclk 53cfec0193SClaudiu Beznea minItems: 1 54cfec0193SClaudiu Beznea 55cfec0193SClaudiu Beznea dmas: 56cfec0193SClaudiu Beznea items: 57cfec0193SClaudiu Beznea - description: TX DMA Channel 58cfec0193SClaudiu Beznea - description: RX DMA Channel 59cfec0193SClaudiu Beznea 60cfec0193SClaudiu Beznea dma-names: 61cfec0193SClaudiu Beznea items: 62cfec0193SClaudiu Beznea - const: tx 63cfec0193SClaudiu Beznea - const: rx 64cfec0193SClaudiu Beznea 65cfec0193SClaudiu Beznea microchip,tdm-data-pair: 66cfec0193SClaudiu Beznea description: 67cfec0193SClaudiu Beznea Represents the DIN/DOUT pair pins that are used to receive/send 68cfec0193SClaudiu Beznea TDM data. It is optional and it is only needed if the controller 69cfec0193SClaudiu Beznea uses the TDM mode. 70cfec0193SClaudiu Beznea $ref: /schemas/types.yaml#/definitions/uint8 71cfec0193SClaudiu Beznea enum: [0, 1, 2, 3] 72cfec0193SClaudiu Beznea default: 0 73cfec0193SClaudiu Beznea 74cfec0193SClaudiu BezneaallOf: 75cfec0193SClaudiu Beznea - $ref: dai-common.yaml# 76cfec0193SClaudiu Beznea - if: 77cfec0193SClaudiu Beznea properties: 78cfec0193SClaudiu Beznea compatible: 79cfec0193SClaudiu Beznea const: microchip,sam9x60-i2smcc 80cfec0193SClaudiu Beznea then: 81cfec0193SClaudiu Beznea properties: 82cfec0193SClaudiu Beznea microchip,tdm-data-pair: false 83cfec0193SClaudiu Beznea 84cfec0193SClaudiu Beznearequired: 85cfec0193SClaudiu Beznea - "#sound-dai-cells" 86cfec0193SClaudiu Beznea - compatible 87cfec0193SClaudiu Beznea - reg 88cfec0193SClaudiu Beznea - interrupts 89cfec0193SClaudiu Beznea - clocks 90cfec0193SClaudiu Beznea - clock-names 91cfec0193SClaudiu Beznea - dmas 92cfec0193SClaudiu Beznea - dma-names 93cfec0193SClaudiu Beznea 94cfec0193SClaudiu BezneaunevaluatedProperties: false 95cfec0193SClaudiu Beznea 96cfec0193SClaudiu Bezneaexamples: 97cfec0193SClaudiu Beznea - | 98cfec0193SClaudiu Beznea #include <dt-bindings/dma/at91.h> 99cfec0193SClaudiu Beznea #include <dt-bindings/interrupt-controller/arm-gic.h> 100cfec0193SClaudiu Beznea 101cfec0193SClaudiu Beznea i2s@f001c000 { 102cfec0193SClaudiu Beznea #sound-dai-cells = <0>; 103cfec0193SClaudiu Beznea compatible = "microchip,sam9x60-i2smcc"; 104cfec0193SClaudiu Beznea reg = <0xf001c000 0x100>; 105cfec0193SClaudiu Beznea interrupts = <34 IRQ_TYPE_LEVEL_HIGH 7>; 106cfec0193SClaudiu Beznea dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | 107cfec0193SClaudiu Beznea AT91_XDMAC_DT_PERID(36))>, 108cfec0193SClaudiu Beznea <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | 109cfec0193SClaudiu Beznea AT91_XDMAC_DT_PERID(37))>; 110cfec0193SClaudiu Beznea dma-names = "tx", "rx"; 111cfec0193SClaudiu Beznea clocks = <&i2s_clk>, <&i2s_gclk>; 112cfec0193SClaudiu Beznea clock-names = "pclk", "gclk"; 113cfec0193SClaudiu Beznea pinctrl-names = "default"; 114cfec0193SClaudiu Beznea pinctrl-0 = <&pinctrl_i2s_default>; 115cfec0193SClaudiu Beznea }; 116