1*e97c6182SEugen Hristev# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*e97c6182SEugen Hristev%YAML 1.2 3*e97c6182SEugen Hristev--- 4*e97c6182SEugen Hristev$id: http://devicetree.org/schemas/sound/mediatek,mt2701-audio.yaml# 5*e97c6182SEugen Hristev$schema: http://devicetree.org/meta-schemas/core.yaml# 6*e97c6182SEugen Hristev 7*e97c6182SEugen Hristevtitle: MediaTek Audio Front End (AFE) PCM controller for mt2701 8*e97c6182SEugen Hristev 9*e97c6182SEugen Hristevdescription: 10*e97c6182SEugen Hristev The AFE PCM node must be a subnode of the MediaTek audsys device tree node. 11*e97c6182SEugen Hristev 12*e97c6182SEugen Hristevmaintainers: 13*e97c6182SEugen Hristev - Eugen Hristev <eugen.hristev@collabora.com> 14*e97c6182SEugen Hristev 15*e97c6182SEugen Hristevproperties: 16*e97c6182SEugen Hristev compatible: 17*e97c6182SEugen Hristev enum: 18*e97c6182SEugen Hristev - mediatek,mt2701-audio 19*e97c6182SEugen Hristev - mediatek,mt7622-audio 20*e97c6182SEugen Hristev 21*e97c6182SEugen Hristev interrupts: 22*e97c6182SEugen Hristev items: 23*e97c6182SEugen Hristev - description: AFE interrupt 24*e97c6182SEugen Hristev - description: ASYS interrupt 25*e97c6182SEugen Hristev 26*e97c6182SEugen Hristev interrupt-names: 27*e97c6182SEugen Hristev items: 28*e97c6182SEugen Hristev - const: afe 29*e97c6182SEugen Hristev - const: asys 30*e97c6182SEugen Hristev 31*e97c6182SEugen Hristev power-domains: 32*e97c6182SEugen Hristev maxItems: 1 33*e97c6182SEugen Hristev 34*e97c6182SEugen Hristev clocks: 35*e97c6182SEugen Hristev items: 36*e97c6182SEugen Hristev - description: audio infra sys clock 37*e97c6182SEugen Hristev - description: top audio mux 1 38*e97c6182SEugen Hristev - description: top audio mux 2 39*e97c6182SEugen Hristev - description: top audio sys a1 clock 40*e97c6182SEugen Hristev - description: top audio sys a2 clock 41*e97c6182SEugen Hristev - description: i2s0 source selection 42*e97c6182SEugen Hristev - description: i2s1 source selection 43*e97c6182SEugen Hristev - description: i2s2 source selection 44*e97c6182SEugen Hristev - description: i2s3 source selection 45*e97c6182SEugen Hristev - description: i2s0 source divider 46*e97c6182SEugen Hristev - description: i2s1 source divider 47*e97c6182SEugen Hristev - description: i2s2 source divider 48*e97c6182SEugen Hristev - description: i2s3 source divider 49*e97c6182SEugen Hristev - description: i2s0 master clock 50*e97c6182SEugen Hristev - description: i2s1 master clock 51*e97c6182SEugen Hristev - description: i2s2 master clock 52*e97c6182SEugen Hristev - description: i2s3 master clock 53*e97c6182SEugen Hristev - description: i2so0 hopping clock 54*e97c6182SEugen Hristev - description: i2so1 hopping clock 55*e97c6182SEugen Hristev - description: i2so2 hopping clock 56*e97c6182SEugen Hristev - description: i2so3 hopping clock 57*e97c6182SEugen Hristev - description: i2si0 hopping clock 58*e97c6182SEugen Hristev - description: i2si1 hopping clock 59*e97c6182SEugen Hristev - description: i2si2 hopping clock 60*e97c6182SEugen Hristev - description: i2si3 hopping clock 61*e97c6182SEugen Hristev - description: asrc0 output clock 62*e97c6182SEugen Hristev - description: asrc1 output clock 63*e97c6182SEugen Hristev - description: asrc2 output clock 64*e97c6182SEugen Hristev - description: asrc3 output clock 65*e97c6182SEugen Hristev - description: audio front end pd clock 66*e97c6182SEugen Hristev - description: audio front end conn pd clock 67*e97c6182SEugen Hristev - description: top audio a1 sys pd 68*e97c6182SEugen Hristev - description: top audio a2 sys pd 69*e97c6182SEugen Hristev - description: audio merge interface pd 70*e97c6182SEugen Hristev 71*e97c6182SEugen Hristev clock-names: 72*e97c6182SEugen Hristev items: 73*e97c6182SEugen Hristev - const: infra_sys_audio_clk 74*e97c6182SEugen Hristev - const: top_audio_mux1_sel 75*e97c6182SEugen Hristev - const: top_audio_mux2_sel 76*e97c6182SEugen Hristev - const: top_audio_a1sys_hp 77*e97c6182SEugen Hristev - const: top_audio_a2sys_hp 78*e97c6182SEugen Hristev - const: i2s0_src_sel 79*e97c6182SEugen Hristev - const: i2s1_src_sel 80*e97c6182SEugen Hristev - const: i2s2_src_sel 81*e97c6182SEugen Hristev - const: i2s3_src_sel 82*e97c6182SEugen Hristev - const: i2s0_src_div 83*e97c6182SEugen Hristev - const: i2s1_src_div 84*e97c6182SEugen Hristev - const: i2s2_src_div 85*e97c6182SEugen Hristev - const: i2s3_src_div 86*e97c6182SEugen Hristev - const: i2s0_mclk_en 87*e97c6182SEugen Hristev - const: i2s1_mclk_en 88*e97c6182SEugen Hristev - const: i2s2_mclk_en 89*e97c6182SEugen Hristev - const: i2s3_mclk_en 90*e97c6182SEugen Hristev - const: i2so0_hop_ck 91*e97c6182SEugen Hristev - const: i2so1_hop_ck 92*e97c6182SEugen Hristev - const: i2so2_hop_ck 93*e97c6182SEugen Hristev - const: i2so3_hop_ck 94*e97c6182SEugen Hristev - const: i2si0_hop_ck 95*e97c6182SEugen Hristev - const: i2si1_hop_ck 96*e97c6182SEugen Hristev - const: i2si2_hop_ck 97*e97c6182SEugen Hristev - const: i2si3_hop_ck 98*e97c6182SEugen Hristev - const: asrc0_out_ck 99*e97c6182SEugen Hristev - const: asrc1_out_ck 100*e97c6182SEugen Hristev - const: asrc2_out_ck 101*e97c6182SEugen Hristev - const: asrc3_out_ck 102*e97c6182SEugen Hristev - const: audio_afe_pd 103*e97c6182SEugen Hristev - const: audio_afe_conn_pd 104*e97c6182SEugen Hristev - const: audio_a1sys_pd 105*e97c6182SEugen Hristev - const: audio_a2sys_pd 106*e97c6182SEugen Hristev - const: audio_mrgif_pd 107*e97c6182SEugen Hristev 108*e97c6182SEugen Hristevrequired: 109*e97c6182SEugen Hristev - compatible 110*e97c6182SEugen Hristev - interrupts 111*e97c6182SEugen Hristev - interrupt-names 112*e97c6182SEugen Hristev - power-domains 113*e97c6182SEugen Hristev - clocks 114*e97c6182SEugen Hristev - clock-names 115*e97c6182SEugen Hristev 116*e97c6182SEugen HristevadditionalProperties: false 117