xref: /linux/Documentation/devicetree/bindings/sound/mediatek,mt8188-afe.yaml (revision 1e4fe75e9746be8e40c57132bb3fba1ce3dd24af)
1692d25b6STrevor Wu# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2692d25b6STrevor Wu%YAML 1.2
3692d25b6STrevor Wu---
4692d25b6STrevor Wu$id: http://devicetree.org/schemas/sound/mediatek,mt8188-afe.yaml#
5692d25b6STrevor Wu$schema: http://devicetree.org/meta-schemas/core.yaml#
6692d25b6STrevor Wu
7692d25b6STrevor Wutitle: MediaTek AFE PCM controller for mt8188
8692d25b6STrevor Wu
9692d25b6STrevor Wumaintainers:
10692d25b6STrevor Wu  - Trevor Wu <trevor.wu@mediatek.com>
11692d25b6STrevor Wu
12692d25b6STrevor Wuproperties:
13692d25b6STrevor Wu  compatible:
14692d25b6STrevor Wu    const: mediatek,mt8188-afe
15692d25b6STrevor Wu
16692d25b6STrevor Wu  reg:
17692d25b6STrevor Wu    maxItems: 1
18692d25b6STrevor Wu
19692d25b6STrevor Wu  interrupts:
20692d25b6STrevor Wu    maxItems: 1
21692d25b6STrevor Wu
22692d25b6STrevor Wu  resets:
23692d25b6STrevor Wu    maxItems: 1
24692d25b6STrevor Wu
25692d25b6STrevor Wu  reset-names:
26692d25b6STrevor Wu    const: audiosys
27692d25b6STrevor Wu
28692d25b6STrevor Wu  mediatek,topckgen:
29692d25b6STrevor Wu    $ref: /schemas/types.yaml#/definitions/phandle
30692d25b6STrevor Wu    description: The phandle of the mediatek topckgen controller
31692d25b6STrevor Wu
32692d25b6STrevor Wu  power-domains:
33692d25b6STrevor Wu    maxItems: 1
34692d25b6STrevor Wu
35692d25b6STrevor Wu  clocks:
36692d25b6STrevor Wu    items:
37692d25b6STrevor Wu      - description: 26M clock
38692d25b6STrevor Wu      - description: audio pll1 clock
39692d25b6STrevor Wu      - description: audio pll2 clock
40692d25b6STrevor Wu      - description: clock divider for i2si1_mck
41692d25b6STrevor Wu      - description: clock divider for i2si2_mck
42692d25b6STrevor Wu      - description: clock divider for i2so1_mck
43692d25b6STrevor Wu      - description: clock divider for i2so2_mck
44692d25b6STrevor Wu      - description: clock divider for dptx_mck
45692d25b6STrevor Wu      - description: a1sys hoping clock
46692d25b6STrevor Wu      - description: audio intbus clock
47692d25b6STrevor Wu      - description: audio hires clock
48692d25b6STrevor Wu      - description: audio local bus clock
49692d25b6STrevor Wu      - description: mux for dptx_mck
50692d25b6STrevor Wu      - description: mux for i2so1_mck
51692d25b6STrevor Wu      - description: mux for i2so2_mck
52692d25b6STrevor Wu      - description: mux for i2si1_mck
53692d25b6STrevor Wu      - description: mux for i2si2_mck
54692d25b6STrevor Wu      - description: audio 26m clock
55692d25b6STrevor Wu
56692d25b6STrevor Wu  clock-names:
57692d25b6STrevor Wu    items:
58692d25b6STrevor Wu      - const: clk26m
59692d25b6STrevor Wu      - const: apll1
60692d25b6STrevor Wu      - const: apll2
61692d25b6STrevor Wu      - const: apll12_div0
62692d25b6STrevor Wu      - const: apll12_div1
63692d25b6STrevor Wu      - const: apll12_div2
64692d25b6STrevor Wu      - const: apll12_div3
65692d25b6STrevor Wu      - const: apll12_div9
66*1e4fe75eSTrevor Wu      - const: top_a1sys_hp
67*1e4fe75eSTrevor Wu      - const: top_aud_intbus
68*1e4fe75eSTrevor Wu      - const: top_audio_h
69*1e4fe75eSTrevor Wu      - const: top_audio_local_bus
70*1e4fe75eSTrevor Wu      - const: top_dptx
71*1e4fe75eSTrevor Wu      - const: top_i2so1
72*1e4fe75eSTrevor Wu      - const: top_i2so2
73*1e4fe75eSTrevor Wu      - const: top_i2si1
74*1e4fe75eSTrevor Wu      - const: top_i2si2
75692d25b6STrevor Wu      - const: adsp_audio_26m
76692d25b6STrevor Wu
77692d25b6STrevor Wu  mediatek,etdm-in1-cowork-source:
78692d25b6STrevor Wu    $ref: /schemas/types.yaml#/definitions/uint32
79692d25b6STrevor Wu    description:
80692d25b6STrevor Wu      etdm modules can share the same external clock pin. Specify
81692d25b6STrevor Wu      which etdm clock source is required by this etdm in module.
82692d25b6STrevor Wu    enum:
83692d25b6STrevor Wu      - 1 # etdm2_in
84692d25b6STrevor Wu      - 2 # etdm1_out
85692d25b6STrevor Wu      - 3 # etdm2_out
86692d25b6STrevor Wu
87692d25b6STrevor Wu  mediatek,etdm-in2-cowork-source:
88692d25b6STrevor Wu    $ref: /schemas/types.yaml#/definitions/uint32
89692d25b6STrevor Wu    description:
90692d25b6STrevor Wu      etdm modules can share the same external clock pin. Specify
91692d25b6STrevor Wu      which etdm clock source is required by this etdm in module.
92692d25b6STrevor Wu    enum:
93692d25b6STrevor Wu      - 0 # etdm1_in
94692d25b6STrevor Wu      - 2 # etdm1_out
95692d25b6STrevor Wu      - 3 # etdm2_out
96692d25b6STrevor Wu
97692d25b6STrevor Wu  mediatek,etdm-out1-cowork-source:
98692d25b6STrevor Wu    $ref: /schemas/types.yaml#/definitions/uint32
99692d25b6STrevor Wu    description:
100692d25b6STrevor Wu      etdm modules can share the same external clock pin. Specify
101692d25b6STrevor Wu      which etdm clock source is required by this etdm out module.
102692d25b6STrevor Wu    enum:
103692d25b6STrevor Wu      - 0 # etdm1_in
104692d25b6STrevor Wu      - 1 # etdm2_in
105692d25b6STrevor Wu      - 3 # etdm2_out
106692d25b6STrevor Wu
107692d25b6STrevor Wu  mediatek,etdm-out2-cowork-source:
108692d25b6STrevor Wu    $ref: /schemas/types.yaml#/definitions/uint32
109692d25b6STrevor Wu    description:
110692d25b6STrevor Wu      etdm modules can share the same external clock pin. Specify
111692d25b6STrevor Wu      which etdm clock source is required by this etdm out module.
112692d25b6STrevor Wu    enum:
113692d25b6STrevor Wu      - 0 # etdm1_in
114692d25b6STrevor Wu      - 1 # etdm2_in
115692d25b6STrevor Wu      - 2 # etdm1_out
116692d25b6STrevor Wu
117692d25b6STrevor WupatternProperties:
118692d25b6STrevor Wu  "^mediatek,etdm-in[1-2]-chn-disabled$":
119692d25b6STrevor Wu    $ref: /schemas/types.yaml#/definitions/uint8-array
120692d25b6STrevor Wu    minItems: 1
121692d25b6STrevor Wu    maxItems: 16
122692d25b6STrevor Wu    description:
123692d25b6STrevor Wu      This is a list of channel IDs which should be disabled.
124692d25b6STrevor Wu      By default, all data received from ETDM pins will be outputed to
125692d25b6STrevor Wu      memory. etdm in supports disable_out in direct mode(w/o interconn),
126692d25b6STrevor Wu      so user can disable the specified channels by the property.
127692d25b6STrevor Wu    uniqueItems: true
128692d25b6STrevor Wu    items:
129692d25b6STrevor Wu      minimum: 0
130692d25b6STrevor Wu      maximum: 15
131692d25b6STrevor Wu
132692d25b6STrevor Wu  "^mediatek,etdm-in[1-2]-multi-pin-mode$":
133692d25b6STrevor Wu    type: boolean
134692d25b6STrevor Wu    description: if present, the etdm data mode is I2S.
135692d25b6STrevor Wu
136692d25b6STrevor Wu  "^mediatek,etdm-out[1-3]-multi-pin-mode$":
137692d25b6STrevor Wu    type: boolean
138692d25b6STrevor Wu    description: if present, the etdm data mode is I2S.
139692d25b6STrevor Wu
140692d25b6STrevor Wurequired:
141692d25b6STrevor Wu  - compatible
142692d25b6STrevor Wu  - reg
143692d25b6STrevor Wu  - interrupts
144692d25b6STrevor Wu  - resets
145692d25b6STrevor Wu  - reset-names
146692d25b6STrevor Wu  - mediatek,topckgen
147692d25b6STrevor Wu  - power-domains
148692d25b6STrevor Wu  - clocks
149692d25b6STrevor Wu  - clock-names
150692d25b6STrevor Wu
151692d25b6STrevor WuadditionalProperties: false
152692d25b6STrevor Wu
153692d25b6STrevor Wuexamples:
154692d25b6STrevor Wu  - |
155692d25b6STrevor Wu    #include <dt-bindings/interrupt-controller/arm-gic.h>
156692d25b6STrevor Wu    #include <dt-bindings/interrupt-controller/irq.h>
157692d25b6STrevor Wu
158692d25b6STrevor Wu    afe@10b10000 {
159692d25b6STrevor Wu        compatible = "mediatek,mt8188-afe";
160692d25b6STrevor Wu        reg = <0x10b10000 0x10000>;
161692d25b6STrevor Wu        interrupts = <GIC_SPI 822 IRQ_TYPE_LEVEL_HIGH 0>;
162692d25b6STrevor Wu        resets = <&watchdog 14>;
163692d25b6STrevor Wu        reset-names = "audiosys";
164692d25b6STrevor Wu        mediatek,topckgen = <&topckgen>;
165692d25b6STrevor Wu        power-domains = <&spm 13>; //MT8188_POWER_DOMAIN_AUDIO
166692d25b6STrevor Wu        mediatek,etdm-in2-cowork-source = <2>;
167692d25b6STrevor Wu        mediatek,etdm-out2-cowork-source = <0>;
168692d25b6STrevor Wu        mediatek,etdm-in1-multi-pin-mode;
169692d25b6STrevor Wu        mediatek,etdm-in1-chn-disabled = /bits/ 8 <0x0 0x2>;
170692d25b6STrevor Wu        clocks = <&clk26m>,
171692d25b6STrevor Wu                 <&apmixedsys 9>, //CLK_APMIXED_APLL1
172692d25b6STrevor Wu                 <&apmixedsys 10>, //CLK_APMIXED_APLL2
173692d25b6STrevor Wu                 <&topckgen 186>, //CLK_TOP_APLL12_CK_DIV0
174692d25b6STrevor Wu                 <&topckgen 187>, //CLK_TOP_APLL12_CK_DIV1
175692d25b6STrevor Wu                 <&topckgen 188>, //CLK_TOP_APLL12_CK_DIV2
176692d25b6STrevor Wu                 <&topckgen 189>, //CLK_TOP_APLL12_CK_DIV3
177692d25b6STrevor Wu                 <&topckgen 191>, //CLK_TOP_APLL12_CK_DIV9
178692d25b6STrevor Wu                 <&topckgen 83>, //CLK_TOP_A1SYS_HP
179692d25b6STrevor Wu                 <&topckgen 31>, //CLK_TOP_AUD_INTBUS
180692d25b6STrevor Wu                 <&topckgen 32>, //CLK_TOP_AUDIO_H
181692d25b6STrevor Wu                 <&topckgen 69>, //CLK_TOP_AUDIO_LOCAL_BUS
182692d25b6STrevor Wu                 <&topckgen 81>, //CLK_TOP_DPTX
183692d25b6STrevor Wu                 <&topckgen 77>, //CLK_TOP_I2SO1
184692d25b6STrevor Wu                 <&topckgen 78>, //CLK_TOP_I2SO2
185692d25b6STrevor Wu                 <&topckgen 79>, //CLK_TOP_I2SI1
186692d25b6STrevor Wu                 <&topckgen 80>, //CLK_TOP_I2SI2
187692d25b6STrevor Wu                 <&adsp_audio26m 0>; //CLK_AUDIODSP_AUDIO26M
188692d25b6STrevor Wu        clock-names = "clk26m",
189692d25b6STrevor Wu                      "apll1",
190692d25b6STrevor Wu                      "apll2",
191692d25b6STrevor Wu                      "apll12_div0",
192692d25b6STrevor Wu                      "apll12_div1",
193692d25b6STrevor Wu                      "apll12_div2",
194692d25b6STrevor Wu                      "apll12_div3",
195692d25b6STrevor Wu                      "apll12_div9",
196*1e4fe75eSTrevor Wu                      "top_a1sys_hp",
197*1e4fe75eSTrevor Wu                      "top_aud_intbus",
198*1e4fe75eSTrevor Wu                      "top_audio_h",
199*1e4fe75eSTrevor Wu                      "top_audio_local_bus",
200*1e4fe75eSTrevor Wu                      "top_dptx",
201*1e4fe75eSTrevor Wu                      "top_i2so1",
202*1e4fe75eSTrevor Wu                      "top_i2so2",
203*1e4fe75eSTrevor Wu                      "top_i2si1",
204*1e4fe75eSTrevor Wu                      "top_i2si2",
205692d25b6STrevor Wu                      "adsp_audio_26m";
206692d25b6STrevor Wu    };
207692d25b6STrevor Wu
208692d25b6STrevor Wu...
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