xref: /linux/Documentation/devicetree/bindings/sound/fsl,sgtl5000.yaml (revision c532de5a67a70f8533d495f8f2aaa9a0491c3ad0) 
1# SPDX-License-Identifier: GPL-2.0-only
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/sound/fsl,sgtl5000.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Freescale SGTL5000 Stereo Codec
8
9maintainers:
10  - Fabio Estevam <festevam@gmail.com>
11
12allOf:
13  - $ref: dai-common.yaml#
14
15properties:
16  compatible:
17    const: fsl,sgtl5000
18
19  reg:
20    maxItems: 1
21
22  "#sound-dai-cells":
23    const: 0
24
25  assigned-clock-parents: true
26  assigned-clock-rates: true
27  assigned-clocks: true
28
29  clocks:
30    items:
31      - description: the clock provider of SYS_MCLK
32
33  VDDA-supply:
34    description: the regulator provider of VDDA
35
36  VDDIO-supply:
37    description: the regulator provider of VDDIO
38
39  VDDD-supply:
40    description: the regulator provider of VDDD
41
42  micbias-resistor-k-ohms:
43    description: The bias resistor to be used in kOhms. The resistor can take
44      values of 2k, 4k or 8k. If set to 0 it will be off. If this node is not
45      mentioned or if the value is unknown, then micbias resistor is set to
46      4k.
47    enum: [ 0, 2, 4, 8 ]
48
49  micbias-voltage-m-volts:
50    description: The bias voltage to be used in mVolts. The voltage can take
51      values from 1.25V to 3V by 250mV steps. If this node is not mentioned
52      or the value is unknown, then the value is set to 1.25V.
53    $ref: /schemas/types.yaml#/definitions/uint32
54    enum: [ 1250, 1500, 1750, 2000, 2250, 2500, 2750, 3000 ]
55
56  lrclk-strength:
57    description: |
58      The LRCLK pad strength. Possible values are: 0, 1, 2 and 3 as per the
59      table below:
60
61        VDDIO		1.8V		2.5V		3.3V
62        0 =		Disable
63        1 =		1.66 mA		2.87 mA		4.02  mA
64        2 =		3.33 mA		5.74 mA		8.03  mA
65        3 =		4.99 mA		8.61 mA		12.05 mA
66    $ref: /schemas/types.yaml#/definitions/uint32
67    enum: [ 0, 1, 2, 3 ]
68
69  sclk-strength:
70    description: |
71      The SCLK pad strength. Possible values are: 0, 1, 2 and 3 as per the
72      table below:
73
74        VDDIO		1.8V		2.5V		3.3V
75        0 =		Disable
76        1 =		1.66 mA		2.87 mA		4.02  mA
77        2 =		3.33 mA		5.74 mA		8.03  mA
78        3 =		4.99 mA		8.61 mA		12.05 mA
79    $ref: /schemas/types.yaml#/definitions/uint32
80    enum: [ 0, 1, 2, 3 ]
81
82  port:
83    $ref: audio-graph-port.yaml#
84    unevaluatedProperties: false
85
86required:
87  - compatible
88  - reg
89  - "#sound-dai-cells"
90  - clocks
91  - VDDA-supply
92  - VDDIO-supply
93
94unevaluatedProperties: false
95
96examples:
97  - |
98    i2c {
99        #address-cells = <1>;
100        #size-cells = <0>;
101
102        codec@a {
103            compatible = "fsl,sgtl5000";
104            reg = <0x0a>;
105            #sound-dai-cells = <0>;
106            clocks = <&clks 150>;
107            micbias-resistor-k-ohms = <2>;
108            micbias-voltage-m-volts = <2250>;
109            VDDA-supply = <&reg_3p3v>;
110            VDDIO-supply = <&reg_3p3v>;
111        };
112    };
113...
114