xref: /linux/Documentation/devicetree/bindings/sound/fsl,mqs.yaml (revision 24168c5e6dfbdd5b414f048f47f75d64533296ca) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/sound/fsl,mqs.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: NXP Medium Quality Sound (MQS)
8
9maintainers:
10  - Shengjiu Wang <shengjiu.wang@nxp.com>
11  - Chancel Liu <chancel.liu@nxp.com>
12
13description: |
14  Medium quality sound (MQS) is used to generate medium quality audio
15  via a standard GPIO in the pinmux, allowing the user to connect
16  stereo speakers or headphones to a power amplifier without an
17  additional DAC chip.
18
19properties:
20  compatible:
21    enum:
22      - fsl,imx6sx-mqs
23      - fsl,imx8qm-mqs
24      - fsl,imx8qxp-mqs
25      - fsl,imx93-mqs
26
27  clocks:
28    minItems: 1
29    maxItems: 2
30
31  clock-names:
32    minItems: 1
33    maxItems: 2
34
35  gpr:
36    $ref: /schemas/types.yaml#/definitions/phandle
37    description: The phandle to the General Purpose Register (GPR) node
38
39  reg:
40    maxItems: 1
41
42  power-domains:
43    maxItems: 1
44
45  resets:
46    maxItems: 1
47
48required:
49  - compatible
50  - clocks
51  - clock-names
52
53allOf:
54  - if:
55      properties:
56        compatible:
57          contains:
58            enum:
59              - fsl,imx8qm-mqs
60              - fsl,imx8qxp-mqs
61    then:
62      properties:
63        clocks:
64          items:
65            - description: Master clock
66            - description: Clock for register access
67        clock-names:
68          items:
69            - const: mclk
70            - const: core
71      required:
72        - reg
73        - power-domains
74    else:
75      properties:
76        clocks:
77          items:
78            - description: Master clock
79        clock-names:
80          items:
81            - const: mclk
82      required:
83        - gpr
84
85additionalProperties: false
86
87examples:
88  - |
89    #include <dt-bindings/clock/imx6sx-clock.h>
90    mqs0: mqs {
91        compatible = "fsl,imx6sx-mqs";
92        gpr = <&gpr>;
93        clocks = <&clks IMX6SX_CLK_SAI1>;
94        clock-names = "mclk";
95    };
96
97  - |
98    #include <dt-bindings/firmware/imx/rsrc.h>
99    mqs1: mqs@59850000 {
100        compatible = "fsl,imx8qm-mqs";
101        reg = <0x59850000 0x10000>;
102        clocks = <&mqs0_lpcg 0>, <&mqs0_lpcg 1>;
103        clock-names = "mclk", "core";
104        power-domains = <&pd IMX_SC_R_MQS_0>;
105    };
106