xref: /linux/Documentation/devicetree/bindings/sound/fsl,xcvr.yaml (revision 9d52d7ea64cc936ed2b3bb2c9056d7c661fbade2) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/sound/fsl,xcvr.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: NXP Audio Transceiver (XCVR) Controller
8
9maintainers:
10  - Viorel Suman <viorel.suman@nxp.com>
11
12description: |
13  NXP XCVR (Audio Transceiver) is a on-chip functional module
14  that allows CPU to receive and transmit digital audio via
15  HDMI2.1 eARC, HDMI1.4 ARC and SPDIF.
16
17properties:
18  $nodename:
19    pattern: "^xcvr@.*"
20
21  compatible:
22    enum:
23      - fsl,imx8mp-xcvr
24      - fsl,imx93-xcvr
25      - fsl,imx95-xcvr
26
27  reg:
28    items:
29      - description: 20K RAM for code and data
30      - description: registers space
31      - description: RX FIFO address
32      - description: TX FIFO address
33
34  reg-names:
35    items:
36      - const: ram
37      - const: regs
38      - const: rxfifo
39      - const: txfifo
40
41  interrupts:
42    items:
43      - description: WAKEUPMIX Audio XCVR Interrupt 1
44      - description: WAKEUPMIX Audio XCVR Interrupt 2
45    minItems: 1
46
47  clocks:
48    items:
49      - description: Peripheral clock
50      - description: PHY clock
51      - description: SPBA clock
52      - description: PLL clock
53      - description: PLL clock source for 8kHz series
54      - description: PLL clock source for 11kHz series
55    minItems: 4
56
57  clock-names:
58    items:
59      - const: ipg
60      - const: phy
61      - const: spba
62      - const: pll_ipg
63      - const: pll8k
64      - const: pll11k
65    minItems: 4
66
67  dmas:
68    items:
69      - description: DMA controller phandle and request line for RX
70      - description: DMA controller phandle and request line for TX
71
72  dma-names:
73    items:
74      - const: rx
75      - const: tx
76
77  resets:
78    maxItems: 1
79
80required:
81  - compatible
82  - reg
83  - reg-names
84  - interrupts
85  - clocks
86  - clock-names
87  - dmas
88  - dma-names
89
90allOf:
91  - if:
92      properties:
93        compatible:
94          contains:
95            const: fsl,imx8mp-xcvr
96    then:
97      required:
98        - resets
99
100  - if:
101      properties:
102        compatible:
103          contains:
104            enum:
105              - fsl,imx93-xcvr
106              - fsl,imx95-xcvr
107    then:
108      properties:
109        interrupts:
110          minItems: 2
111          maxItems: 2
112    else:
113      properties:
114        interrupts:
115          maxItems: 1
116
117  - if:
118      properties:
119        compatible:
120          contains:
121            enum:
122              - fsl,imx8mp-xcvr
123              - fsl,imx93-xcvr
124    then:
125      properties:
126        clocks:
127          maxItems: 4
128        clock-names:
129          maxItems: 4
130
131additionalProperties: false
132
133examples:
134  - |
135    #include <dt-bindings/interrupt-controller/arm-gic.h>
136    #include <dt-bindings/clock/imx8mp-clock.h>
137    #include <dt-bindings/reset/imx8mp-reset.h>
138
139    xcvr: xcvr@30cc0000 {
140           compatible = "fsl,imx8mp-xcvr";
141           reg = <0x30cc0000 0x800>,
142                 <0x30cc0800 0x400>,
143                 <0x30cc0c00 0x080>,
144                 <0x30cc0e00 0x080>;
145           reg-names = "ram", "regs", "rxfifo", "txfifo";
146           interrupts = <0x0 128 IRQ_TYPE_LEVEL_HIGH>;
147           clocks = <&audiomix_clk IMX8MP_CLK_AUDIOMIX_EARC_IPG>,
148                    <&audiomix_clk IMX8MP_CLK_AUDIOMIX_EARC_PHY>,
149                    <&audiomix_clk IMX8MP_CLK_AUDIOMIX_SPBA2_ROOT>,
150                    <&audiomix_clk IMX8MP_CLK_AUDIOMIX_AUDPLL_ROOT>;
151           clock-names = "ipg", "phy", "spba", "pll_ipg";
152           dmas = <&sdma2 30 2 0>, <&sdma2 31 2 0>;
153           dma-names = "rx", "tx";
154           resets = <&audiomix_reset 0>;
155    };
156