xref: /linux/Documentation/devicetree/bindings/sound/fsl,mqs.yaml (revision a1ff5a7d78a036d6c2178ee5acd6ba4946243800)
19996cd78SChancel Liu# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
29996cd78SChancel Liu%YAML 1.2
39996cd78SChancel Liu---
49996cd78SChancel Liu$id: http://devicetree.org/schemas/sound/fsl,mqs.yaml#
59996cd78SChancel Liu$schema: http://devicetree.org/meta-schemas/core.yaml#
69996cd78SChancel Liu
79996cd78SChancel Liutitle: NXP Medium Quality Sound (MQS)
89996cd78SChancel Liu
99996cd78SChancel Liumaintainers:
109996cd78SChancel Liu  - Shengjiu Wang <shengjiu.wang@nxp.com>
119996cd78SChancel Liu  - Chancel Liu <chancel.liu@nxp.com>
129996cd78SChancel Liu
139996cd78SChancel Liudescription: |
149996cd78SChancel Liu  Medium quality sound (MQS) is used to generate medium quality audio
159996cd78SChancel Liu  via a standard GPIO in the pinmux, allowing the user to connect
169996cd78SChancel Liu  stereo speakers or headphones to a power amplifier without an
179996cd78SChancel Liu  additional DAC chip.
189996cd78SChancel Liu
199996cd78SChancel Liuproperties:
209996cd78SChancel Liu  compatible:
219996cd78SChancel Liu    enum:
229996cd78SChancel Liu      - fsl,imx6sx-mqs
239996cd78SChancel Liu      - fsl,imx8qm-mqs
249996cd78SChancel Liu      - fsl,imx8qxp-mqs
259996cd78SChancel Liu      - fsl,imx93-mqs
26*4c7d2dc6SShengjiu Wang      - fsl,imx95-aonmix-mqs
27*4c7d2dc6SShengjiu Wang      - fsl,imx95-netcmix-mqs
289996cd78SChancel Liu
299996cd78SChancel Liu  clocks:
309996cd78SChancel Liu    minItems: 1
319996cd78SChancel Liu    maxItems: 2
329996cd78SChancel Liu
339996cd78SChancel Liu  clock-names:
349996cd78SChancel Liu    minItems: 1
359996cd78SChancel Liu    maxItems: 2
369996cd78SChancel Liu
379996cd78SChancel Liu  gpr:
389996cd78SChancel Liu    $ref: /schemas/types.yaml#/definitions/phandle
399996cd78SChancel Liu    description: The phandle to the General Purpose Register (GPR) node
409996cd78SChancel Liu
419996cd78SChancel Liu  reg:
429996cd78SChancel Liu    maxItems: 1
439996cd78SChancel Liu
449996cd78SChancel Liu  power-domains:
459996cd78SChancel Liu    maxItems: 1
469996cd78SChancel Liu
479996cd78SChancel Liu  resets:
489996cd78SChancel Liu    maxItems: 1
499996cd78SChancel Liu
509996cd78SChancel Liurequired:
519996cd78SChancel Liu  - compatible
529996cd78SChancel Liu  - clocks
539996cd78SChancel Liu  - clock-names
549996cd78SChancel Liu
559996cd78SChancel LiuallOf:
569996cd78SChancel Liu  - if:
579996cd78SChancel Liu      properties:
589996cd78SChancel Liu        compatible:
599996cd78SChancel Liu          contains:
609996cd78SChancel Liu            enum:
619996cd78SChancel Liu              - fsl,imx8qm-mqs
629996cd78SChancel Liu              - fsl,imx8qxp-mqs
639996cd78SChancel Liu    then:
649996cd78SChancel Liu      properties:
659996cd78SChancel Liu        clocks:
669996cd78SChancel Liu          items:
679996cd78SChancel Liu            - description: Master clock
689996cd78SChancel Liu            - description: Clock for register access
699996cd78SChancel Liu        clock-names:
709996cd78SChancel Liu          items:
719996cd78SChancel Liu            - const: mclk
729996cd78SChancel Liu            - const: core
739996cd78SChancel Liu      required:
749996cd78SChancel Liu        - reg
759996cd78SChancel Liu        - power-domains
769996cd78SChancel Liu    else:
779996cd78SChancel Liu      properties:
789996cd78SChancel Liu        clocks:
799996cd78SChancel Liu          items:
809996cd78SChancel Liu            - description: Master clock
819996cd78SChancel Liu        clock-names:
829996cd78SChancel Liu          items:
839996cd78SChancel Liu            - const: mclk
849996cd78SChancel Liu      required:
859996cd78SChancel Liu        - gpr
869996cd78SChancel Liu
879996cd78SChancel LiuadditionalProperties: false
889996cd78SChancel Liu
899996cd78SChancel Liuexamples:
909996cd78SChancel Liu  - |
919996cd78SChancel Liu    #include <dt-bindings/clock/imx6sx-clock.h>
929996cd78SChancel Liu    mqs0: mqs {
939996cd78SChancel Liu        compatible = "fsl,imx6sx-mqs";
949996cd78SChancel Liu        gpr = <&gpr>;
959996cd78SChancel Liu        clocks = <&clks IMX6SX_CLK_SAI1>;
969996cd78SChancel Liu        clock-names = "mclk";
979996cd78SChancel Liu    };
989996cd78SChancel Liu
999996cd78SChancel Liu  - |
1009996cd78SChancel Liu    #include <dt-bindings/firmware/imx/rsrc.h>
1019996cd78SChancel Liu    mqs1: mqs@59850000 {
1029996cd78SChancel Liu        compatible = "fsl,imx8qm-mqs";
1039996cd78SChancel Liu        reg = <0x59850000 0x10000>;
1049996cd78SChancel Liu        clocks = <&mqs0_lpcg 0>, <&mqs0_lpcg 1>;
1059996cd78SChancel Liu        clock-names = "mclk", "core";
1069996cd78SChancel Liu        power-domains = <&pd IMX_SC_R_MQS_0>;
1079996cd78SChancel Liu    };
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