xref: /linux/Documentation/devicetree/bindings/sound/everest,es8326.yaml (revision 7f71507851fc7764b36a3221839607d3a45c2025)
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/sound/everest,es8326.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Everest ES8326 audio CODEC
8
9maintainers:
10  - David Yang <yangxiaohua@everest-semi.com>
11
12properties:
13  compatible:
14    const: everest,es8326
15
16  reg:
17    maxItems: 1
18
19  clocks:
20    items:
21      - description: clock for master clock (MCLK)
22
23  clock-names:
24    items:
25      - const: mclk
26
27  interrupts:
28    maxItems: 1
29    description: interrupt output for headset detection
30
31  "#sound-dai-cells":
32    const: 0
33
34  everest,jack-pol:
35    $ref: /schemas/types.yaml#/definitions/uint8
36    description: |
37      just the value of reg 57. Bit(3) decides whether the jack polarity is inverted.
38      Bit(2) decides whether the button on the headset is inverted.
39      Bit(1)/(0) decides the mic property to be OMTP/CTIA or auto.
40    minimum: 0x00
41    maximum: 0x0f
42    default: 0x0f
43
44  everest,mic1-src:
45    deprecated: true
46    $ref: /schemas/types.yaml#/definitions/uint8
47    description:
48      the value of reg 2A when headset plugged.
49    minimum: 0x00
50    maximum: 0x77
51    default: 0x22
52
53  everest,mic2-src:
54    deprecated: true
55    $ref: /schemas/types.yaml#/definitions/uint8
56    description:
57      the value of reg 2A when headset unplugged.
58    minimum: 0x00
59    maximum: 0x77
60    default: 0x44
61
62  everest,jack-detect-inverted:
63    $ref: /schemas/types.yaml#/definitions/flag
64    description:
65      Defined to invert the jack detection.
66
67  everest,interrupt-src:
68    $ref: /schemas/types.yaml#/definitions/uint8
69    description: |
70      value of reg 0x58, Defines the interrupt source.
71      Bit(2) 1 means button press triggers irq, 0 means not.
72      Bit(3) 1 means PIN9 is the irq source for jack detection. When set to 0,
73      bias change on PIN9 do not triggers irq.
74      Bit(4) 1 means PIN27 is the irq source for jack detection.
75      Bit(5) 1 means PIN9 is the irq source after MIC detect.
76      Bit(6) 1 means PIN27 is the irq source after MIC detect.
77    minimum: 0
78    maximum: 0x3c
79    default: 0x08
80
81  everest,interrupt-clk:
82    $ref: /schemas/types.yaml#/definitions/uint8
83    description: |
84     value of reg 0x59, Defines the interrupt output behavior.
85     Bit(0-3) 0 means irq pulse equals 512*internal clock
86       1 means irq pulse equals 1024*internal clock
87       2 means ...
88       7 means irq pulse equals 65536*internal clock
89       8 means irq mutes PA
90       9 means irq mutes PA and DAC output
91     Bit(4) 1 means we invert the interrupt output.
92     Bit(6) 1 means the chip do not detect jack type after button released.
93       0 means the chip detect jack type again after button released.
94    minimum: 0
95    maximum: 0x7f
96    default: 0x00
97
98required:
99  - compatible
100  - reg
101  - "#sound-dai-cells"
102
103additionalProperties: false
104
105examples:
106  - |
107    i2c {
108      #address-cells = <1>;
109      #size-cells = <0>;
110      es8326: codec@19 {
111        compatible = "everest,es8326";
112        reg = <0x19>;
113        clocks = <&clks 10>;
114        clock-names = "mclk";
115        #sound-dai-cells = <0>;
116        everest,jack-pol = [0e];
117        everest,interrupt-src = [08];
118        everest,interrupt-clk = [00];
119      };
120    };
121