1*2b65df25SPaul HandriganCS4265 audio CODEC 2*2b65df25SPaul Handrigan 3*2b65df25SPaul HandriganThis device supports I2C only. 4*2b65df25SPaul Handrigan 5*2b65df25SPaul HandriganRequired properties: 6*2b65df25SPaul Handrigan 7*2b65df25SPaul Handrigan - compatible : "cirrus,cs4265" 8*2b65df25SPaul Handrigan 9*2b65df25SPaul Handrigan - reg : the I2C address of the device for I2C. The I2C address depends on 10*2b65df25SPaul Handrigan the state of the AD0 pin. If AD0 is high, the i2c address is 0x4f. 11*2b65df25SPaul Handrigan If it is low, the i2c address is 0x4e. 12*2b65df25SPaul Handrigan 13*2b65df25SPaul HandriganOptional properties: 14*2b65df25SPaul Handrigan 15*2b65df25SPaul Handrigan - reset-gpios : a GPIO spec for the reset pin. If specified, it will be 16*2b65df25SPaul Handrigan deasserted before communication to the codec starts. 17*2b65df25SPaul Handrigan 18*2b65df25SPaul HandriganExamples: 19*2b65df25SPaul Handrigan 20*2b65df25SPaul Handrigancodec_ad0_high: cs4265@4f { /* AD0 Pin is high */ 21*2b65df25SPaul Handrigan compatible = "cirrus,cs4265"; 22*2b65df25SPaul Handrigan reg = <0x4f>; 23*2b65df25SPaul Handrigan}; 24*2b65df25SPaul Handrigan 25*2b65df25SPaul Handrigan 26*2b65df25SPaul Handrigancodec_ad0_low: cs4265@4e { /* AD0 Pin is low */ 27*2b65df25SPaul Handrigan compatible = "cirrus,cs4265"; 28*2b65df25SPaul Handrigan reg = <0x4e>; 29*2b65df25SPaul Handrigan}; 30