1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/sound/cirrus,cs4271.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Cirrus Logic CS4271 audio CODEC 8 9maintainers: 10 - Alexander Sverdlin <alexander.sverdlin@gmail.com> 11 - Nikita Shubin <nikita.shubin@maquefel.me> 12 13description: 14 The CS4271 is a stereo audio codec. This device supports both the I2C 15 and the SPI bus. 16 17allOf: 18 - $ref: dai-common.yaml# 19 - $ref: /schemas/spi/spi-peripheral-props.yaml# 20 21properties: 22 compatible: 23 const: cirrus,cs4271 24 25 reg: 26 maxItems: 1 27 28 spi-cpha: true 29 30 spi-cpol: true 31 32 '#sound-dai-cells': 33 const: 0 34 35 reset-gpios: 36 description: 37 This pin will be deasserted before communication to the codec starts. 38 maxItems: 1 39 40 va-supply: 41 description: Analog power supply. 42 43 vd-supply: 44 description: Digital power supply. 45 46 vl-supply: 47 description: Serial Control Port power supply. 48 49 port: 50 $ref: audio-graph-port.yaml# 51 unevaluatedProperties: false 52 53 cirrus,amuteb-eq-bmutec: 54 description: 55 When given, the Codec's AMUTEB=BMUTEC flag is enabled. 56 type: boolean 57 58 cirrus,enable-soft-reset: 59 description: | 60 The CS4271 requires its LRCLK and MCLK to be stable before its RESET 61 line is de-asserted. That also means that clocks cannot be changed 62 without putting the chip back into hardware reset, which also requires 63 a complete re-initialization of all registers. 64 65 One (undocumented) workaround is to assert and de-assert the PDN bit 66 in the MODE2 register. This workaround can be enabled with this DT 67 property. 68 69 Note that this is not needed in case the clocks are stable 70 throughout the entire runtime of the codec. 71 type: boolean 72 73required: 74 - compatible 75 - reg 76 77unevaluatedProperties: false 78 79examples: 80 - | 81 #include <dt-bindings/gpio/gpio.h> 82 spi { 83 #address-cells = <1>; 84 #size-cells = <0>; 85 codec@0 { 86 compatible = "cirrus,cs4271"; 87 reg = <0>; 88 #sound-dai-cells = <0>; 89 spi-max-frequency = <6000000>; 90 spi-cpol; 91 spi-cpha; 92 reset-gpios = <&gpio0 1 GPIO_ACTIVE_LOW>; 93 port { 94 endpoint { 95 remote-endpoint = <&i2s_ep>; 96 }; 97 }; 98 }; 99 }; 100 101... 102