1*ad72a1e7SXiaxi Shen# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 2*ad72a1e7SXiaxi Shen%YAML 1.2 3*ad72a1e7SXiaxi Shen--- 4*ad72a1e7SXiaxi Shen$id: http://devicetree.org/schemas/sound/asahi-kasei,ak4104.yaml# 5*ad72a1e7SXiaxi Shen$schema: http://devicetree.org/meta-schemas/core.yaml# 6*ad72a1e7SXiaxi Shen 7*ad72a1e7SXiaxi Shentitle: AK4104 S/PDIF transmitter 8*ad72a1e7SXiaxi Shen 9*ad72a1e7SXiaxi ShenallOf: 10*ad72a1e7SXiaxi Shen - $ref: dai-common.yaml# 11*ad72a1e7SXiaxi Shen 12*ad72a1e7SXiaxi Shenmaintainers: 13*ad72a1e7SXiaxi Shen - Daniel Mack <github@zonque.org> 14*ad72a1e7SXiaxi Shen - Xiaxi Shen <shenxiaxi26@gmail.com> 15*ad72a1e7SXiaxi Shen 16*ad72a1e7SXiaxi Shenproperties: 17*ad72a1e7SXiaxi Shen compatible: 18*ad72a1e7SXiaxi Shen const: asahi-kasei,ak4104 19*ad72a1e7SXiaxi Shen 20*ad72a1e7SXiaxi Shen reg: 21*ad72a1e7SXiaxi Shen description: Chip select number on the SPI bus 22*ad72a1e7SXiaxi Shen maxItems: 1 23*ad72a1e7SXiaxi Shen 24*ad72a1e7SXiaxi Shen vdd-supply: 25*ad72a1e7SXiaxi Shen description: A regulator node providing between 2.7V and 3.6V. 26*ad72a1e7SXiaxi Shen 27*ad72a1e7SXiaxi Shen reset-gpios: 28*ad72a1e7SXiaxi Shen maxItems: 1 29*ad72a1e7SXiaxi Shen description: Optional GPIO spec for the reset pin, deasserted 30*ad72a1e7SXiaxi Shen before communication starts. 31*ad72a1e7SXiaxi Shen 32*ad72a1e7SXiaxi Shenrequired: 33*ad72a1e7SXiaxi Shen - compatible 34*ad72a1e7SXiaxi Shen - reg 35*ad72a1e7SXiaxi Shen - vdd-supply 36*ad72a1e7SXiaxi Shen 37*ad72a1e7SXiaxi ShenunevaluatedProperties: false 38*ad72a1e7SXiaxi Shen 39*ad72a1e7SXiaxi Shenexamples: 40*ad72a1e7SXiaxi Shen - | 41*ad72a1e7SXiaxi Shen i2c { 42*ad72a1e7SXiaxi Shen #address-cells = <1>; 43*ad72a1e7SXiaxi Shen #size-cells = <0>; 44*ad72a1e7SXiaxi Shen codec@0 { 45*ad72a1e7SXiaxi Shen compatible = "asahi-kasei,ak4104"; 46*ad72a1e7SXiaxi Shen reg = <0>; 47*ad72a1e7SXiaxi Shen vdd-supply = <&vdd_3v3_reg>; 48*ad72a1e7SXiaxi Shen }; 49*ad72a1e7SXiaxi Shen }; 50