1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/soc/ti/ti,pruss.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: |+ 8 TI Programmable Real-Time Unit and Industrial Communication Subsystem 9 10maintainers: 11 - Suman Anna <s-anna@ti.com> 12 13description: |+ 14 The Programmable Real-Time Unit and Industrial Communication Subsystem 15 (PRU-ICSS a.k.a. PRUSS) is present on various TI SoCs such as AM335x, AM437x, 16 Keystone 66AK2G, OMAP-L138/DA850 etc. A PRUSS consists of dual 32-bit RISC 17 cores (Programmable Real-Time Units, or PRUs), shared RAM, data and 18 instruction RAMs, some internal peripheral modules to facilitate industrial 19 communication, and an interrupt controller. 20 21 The programmable nature of the PRUs provide flexibility to implement custom 22 peripheral interfaces, fast real-time responses, or specialized data handling. 23 The common peripheral modules include the following, 24 - an Ethernet MII_RT module with two MII ports 25 - an MDIO port to control external Ethernet PHYs 26 - an Industrial Ethernet Peripheral (IEP) to manage/generate Industrial 27 Ethernet functions 28 - an Enhanced Capture Module (eCAP) 29 - an Industrial Ethernet Timer with 7/9 capture and 16 compare events 30 - a 16550-compatible UART to support PROFIBUS 31 - Enhanced GPIO with async capture and serial support 32 33 A PRU-ICSS subsystem can have up to three shared data memories. A PRU core 34 acts on a primary Data RAM (there are usually 2 Data RAMs) at its address 35 0x0, but also has access to a secondary Data RAM (primary to the other PRU 36 core) at its address 0x2000. A shared Data RAM, if present, can be accessed 37 by both the PRU cores. The Interrupt Controller (INTC) and a CFG module are 38 common to both the PRU cores. Each PRU core also has a private instruction 39 RAM, and specific register spaces for Control and Debug functionalities. 40 41 Various sub-modules within a PRU-ICSS subsystem are represented as individual 42 nodes and are defined using a parent-child hierarchy depending on their 43 integration within the IP and the SoC. These nodes are described in the 44 following sections. 45 46 PRU-ICSS Node 47 ============== 48 Each PRU-ICSS instance is represented as its own node with the individual PRU 49 processor cores, the memories node, an INTC node and an MDIO node represented 50 as child nodes within this PRUSS node. This node shall be a child of the 51 corresponding interconnect bus nodes or target-module nodes. 52 53 See ../../mfd/syscon.yaml for generic SysCon binding details. 54 55properties: 56 $nodename: 57 pattern: "^(pruss|icssg)@[0-9a-f]+$" 58 59 compatible: 60 enum: 61 - ti,am3356-pruss # for AM335x SoC family 62 - ti,am4376-pruss0 # for AM437x SoC family and PRUSS unit 0 63 - ti,am4376-pruss1 # for AM437x SoC family and PRUSS unit 1 64 - ti,am5728-pruss # for AM57xx SoC family 65 - ti,am625-pruss # for K3 AM62x SoC family 66 - ti,am642-icssg # for K3 AM64x SoC family 67 - ti,am654-icssg # for K3 AM65x SoC family 68 - ti,j721e-icssg # for K3 J721E SoC family 69 - ti,k2g-pruss # for 66AK2G SoC family 70 71 reg: 72 maxItems: 1 73 74 "#address-cells": 75 const: 1 76 77 "#size-cells": 78 const: 1 79 80 ranges: 81 maxItems: 1 82 83 dma-ranges: 84 maxItems: 1 85 86 dma-coherent: true 87 88 power-domains: 89 description: | 90 This property is as per sci-pm-domain.txt. 91 92 clocks: 93 items: 94 - description: ICSSG_CORE Clock 95 - description: ICSSG_IEP Clock 96 - description: ICSSG_RGMII_MHZ_250 Clock 97 - description: ICSSG_RGMII_MHZ_50 Clock 98 - description: ICSSG_RGMII_MHZ_5 Clock 99 - description: ICSSG_UART Clock 100 - description: ICSSG_ICLK Clock 101 102patternProperties: 103 104 memories@[a-f0-9]+$: 105 description: | 106 The various Data RAMs within a single PRU-ICSS unit are represented as a 107 single node with the name 'memories'. 108 109 type: object 110 111 properties: 112 reg: 113 minItems: 2 # On AM437x one of two PRUSS units don't contain Shared RAM. 114 items: 115 - description: Address and size of the Data RAM0. 116 - description: Address and size of the Data RAM1. 117 - description: | 118 Address and size of the Shared Data RAM. Note that on AM437x one 119 of two PRUSS units don't contain Shared RAM, while the second one 120 has it. 121 122 reg-names: 123 minItems: 2 124 items: 125 - const: dram0 126 - const: dram1 127 - const: shrdram2 128 129 required: 130 - reg 131 - reg-names 132 133 additionalProperties: false 134 135 cfg@[a-f0-9]+$: 136 description: | 137 PRU-ICSS configuration space. CFG sub-module represented as a SysCon. 138 139 type: object 140 additionalProperties: false 141 142 properties: 143 compatible: 144 items: 145 - const: ti,pruss-cfg 146 - const: syscon 147 148 "#address-cells": 149 const: 1 150 151 "#size-cells": 152 const: 1 153 154 reg: 155 maxItems: 1 156 157 ranges: 158 maxItems: 1 159 160 clocks: 161 type: object 162 163 properties: 164 "#address-cells": 165 const: 1 166 167 "#size-cells": 168 const: 0 169 170 patternProperties: 171 coreclk-mux@[a-f0-9]+$: 172 description: | 173 This is applicable only for ICSSG (K3 SoCs). The ICSSG modules 174 core clock can be set to one of the 2 sources: ICSSG_CORE_CLK or 175 ICSSG_ICLK. This node models this clock mux and should have the 176 name "coreclk-mux". 177 178 type: object 179 180 properties: 181 '#clock-cells': 182 const: 0 183 184 clocks: 185 items: 186 - description: ICSSG_CORE Clock 187 - description: ICSSG_ICLK Clock 188 189 assigned-clocks: 190 maxItems: 1 191 192 assigned-clock-parents: 193 maxItems: 1 194 description: | 195 Standard assigned-clocks-parents definition used for selecting 196 mux parent (one of the mux input). 197 198 reg: 199 maxItems: 1 200 201 required: 202 - clocks 203 204 additionalProperties: false 205 206 iepclk-mux@[a-f0-9]+$: 207 description: | 208 The IEP module can get its clock from 2 sources: ICSSG_IEP_CLK or 209 CORE_CLK (OCP_CLK in older SoCs). This node models this clock 210 mux and should have the name "iepclk-mux". 211 212 type: object 213 214 properties: 215 '#clock-cells': 216 const: 0 217 218 clocks: 219 items: 220 - description: ICSSG_IEP Clock 221 - description: Core Clock (OCP Clock in older SoCs) 222 223 assigned-clocks: 224 maxItems: 1 225 226 assigned-clock-parents: 227 maxItems: 1 228 description: | 229 Standard assigned-clocks-parents definition used for selecting 230 mux parent (one of the mux input). 231 232 reg: 233 maxItems: 1 234 235 required: 236 - clocks 237 238 additionalProperties: false 239 240 additionalProperties: false 241 242 iep@[a-f0-9]+$: 243 description: | 244 Industrial Ethernet Peripheral to manage/generate Industrial Ethernet 245 functions such as time stamping. Each PRUSS has either 1 IEP (on AM335x, 246 AM437x, AM57xx & 66AK2G SoCs) or 2 IEPs (on K3 AM65x, J721E & AM64x SoCs). 247 IEP is used for creating PTP clocks and generating PPS signals. 248 249 type: object 250 251 ecap@[a-f0-9]+$: 252 description: 253 PRU-ICSS has a Enhanced Capture (eCAP) event module which can generate 254 and capture periodic timer based events which will be used for features 255 like RX Pacing to rise interrupt when the timer event has occurred. 256 Each PRU-ICSS instance has one eCAP module irrespective of SOCs. 257 $ref: /schemas/net/ti,pruss-ecap.yaml# 258 type: object 259 260 mii-rt@[a-f0-9]+$: 261 description: | 262 Real-Time Ethernet to support multiple industrial communication protocols. 263 MII-RT sub-module represented as a SysCon. 264 265 type: object 266 267 properties: 268 compatible: 269 items: 270 - const: ti,pruss-mii 271 - const: syscon 272 273 reg: 274 maxItems: 1 275 276 additionalProperties: false 277 278 mii-g-rt@[a-f0-9]+$: 279 description: | 280 The Real-time Media Independent Interface to support multiple industrial 281 communication protocols (G stands for Gigabit). MII-G-RT sub-module 282 represented as a SysCon. 283 284 type: object 285 286 properties: 287 compatible: 288 items: 289 - const: ti,pruss-mii-g 290 - const: syscon 291 292 reg: 293 maxItems: 1 294 295 additionalProperties: false 296 297 ^pa-stats@[a-f0-9]+$: 298 description: | 299 PA-STATS sub-module represented as a SysCon. PA_STATS is a set of 300 registers where different statistics related to ICSSG, are dumped by 301 ICSSG firmware. This syscon sub-module will help the device to 302 access/read/write those statistics. 303 304 type: object 305 306 additionalProperties: false 307 308 properties: 309 compatible: 310 items: 311 - const: ti,pruss-pa-st 312 - const: syscon 313 314 reg: 315 maxItems: 1 316 317 interrupt-controller@[a-f0-9]+$: 318 description: | 319 PRUSS INTC Node. Each PRUSS has a single interrupt controller instance 320 that is common to all the PRU cores. This should be represented as an 321 interrupt-controller node. 322 $ref: /schemas/interrupt-controller/ti,pruss-intc.yaml# 323 type: object 324 325 mdio@[a-f0-9]+$: 326 description: | 327 MDIO Node. Each PRUSS has an MDIO module that can be used to control 328 external PHYs. The MDIO module used within the PRU-ICSS is an instance of 329 the MDIO Controller used in TI Davinci SoCs. 330 $ref: /schemas/net/ti,davinci-mdio.yaml# 331 type: object 332 333 "^(pru|rtu|txpru)@[0-9a-f]+$": 334 description: | 335 PRU Node. Each PRUSS has dual PRU cores, each represented as a RemoteProc 336 device through a PRU child node each. Each node can optionally be rendered 337 inactive by using the standard DT string property, "status". The ICSSG IP 338 present on K3 SoCs have additional auxiliary PRU cores with slightly 339 different IP integration. 340 $ref: /schemas/remoteproc/ti,pru-rproc.yaml# 341 type: object 342 343required: 344 - compatible 345 - reg 346 - ranges 347 348additionalProperties: false 349 350# Due to inability of correctly verifying sub-nodes with an @address through 351# the "required" list, the required sub-nodes below are commented out for now. 352 353# required: 354# - memories 355# - interrupt-controller 356# - pru 357 358allOf: 359 - if: 360 properties: 361 compatible: 362 contains: 363 enum: 364 - ti,k2g-pruss 365 - ti,am654-icssg 366 - ti,j721e-icssg 367 - ti,am642-icssg 368 then: 369 required: 370 - power-domains 371 372 - if: 373 properties: 374 compatible: 375 contains: 376 enum: 377 - ti,k2g-pruss 378 then: 379 required: 380 - dma-coherent 381 382examples: 383 - | 384 385 /* Example 1 AM33xx PRU-ICSS */ 386 pruss: pruss@0 { 387 compatible = "ti,am3356-pruss"; 388 reg = <0x0 0x80000>; 389 #address-cells = <1>; 390 #size-cells = <1>; 391 ranges; 392 393 pruss_mem: memories@0 { 394 reg = <0x0 0x2000>, 395 <0x2000 0x2000>, 396 <0x10000 0x3000>; 397 reg-names = "dram0", "dram1", "shrdram2"; 398 }; 399 400 pruss_cfg: cfg@26000 { 401 compatible = "ti,pruss-cfg", "syscon"; 402 #address-cells = <1>; 403 #size-cells = <1>; 404 reg = <0x26000 0x2000>; 405 ranges = <0x00 0x26000 0x2000>; 406 407 clocks { 408 #address-cells = <1>; 409 #size-cells = <0>; 410 411 pruss_iepclk_mux: iepclk-mux@30 { 412 reg = <0x30>; 413 #clock-cells = <0>; 414 clocks = <&l3_gclk>, /* icss_iep */ 415 <&pruss_ocp_gclk>; /* icss_ocp */ 416 }; 417 }; 418 }; 419 420 pruss_mii_rt: mii-rt@32000 { 421 compatible = "ti,pruss-mii", "syscon"; 422 reg = <0x32000 0x58>; 423 }; 424 425 pruss_intc: interrupt-controller@20000 { 426 compatible = "ti,pruss-intc"; 427 reg = <0x20000 0x2000>; 428 interrupt-controller; 429 #interrupt-cells = <3>; 430 interrupts = <20 21 22 23 24 25 26 27>; 431 interrupt-names = "host_intr0", "host_intr1", 432 "host_intr2", "host_intr3", 433 "host_intr4", "host_intr5", 434 "host_intr6", "host_intr7"; 435 }; 436 437 pru0: pru@34000 { 438 compatible = "ti,am3356-pru"; 439 reg = <0x34000 0x2000>, 440 <0x22000 0x400>, 441 <0x22400 0x100>; 442 reg-names = "iram", "control", "debug"; 443 firmware-name = "am335x-pru0-fw"; 444 }; 445 446 pru1: pru@38000 { 447 compatible = "ti,am3356-pru"; 448 reg = <0x38000 0x2000>, 449 <0x24000 0x400>, 450 <0x24400 0x100>; 451 reg-names = "iram", "control", "debug"; 452 firmware-name = "am335x-pru1-fw"; 453 }; 454 455 pruss_mdio: mdio@32400 { 456 compatible = "ti,davinci_mdio"; 457 reg = <0x32400 0x90>; 458 clocks = <&dpll_core_m4_ck>; 459 clock-names = "fck"; 460 bus_freq = <1000000>; 461 #address-cells = <1>; 462 #size-cells = <0>; 463 }; 464 }; 465 466 - | 467 468 /* Example 2 AM43xx PRU-ICSS with PRUSS1 node */ 469 #include <dt-bindings/interrupt-controller/arm-gic.h> 470 pruss1: pruss@0 { 471 compatible = "ti,am4376-pruss1"; 472 reg = <0x0 0x40000>; 473 #address-cells = <1>; 474 #size-cells = <1>; 475 ranges; 476 477 pruss1_mem: memories@0 { 478 reg = <0x0 0x2000>, 479 <0x2000 0x2000>, 480 <0x10000 0x8000>; 481 reg-names = "dram0", "dram1", "shrdram2"; 482 }; 483 484 pruss1_cfg: cfg@26000 { 485 compatible = "ti,pruss-cfg", "syscon"; 486 #address-cells = <1>; 487 #size-cells = <1>; 488 reg = <0x26000 0x2000>; 489 ranges = <0x00 0x26000 0x2000>; 490 491 clocks { 492 #address-cells = <1>; 493 #size-cells = <0>; 494 495 pruss1_iepclk_mux: iepclk-mux@30 { 496 reg = <0x30>; 497 #clock-cells = <0>; 498 clocks = <&sysclk_div>, /* icss_iep */ 499 <&pruss_ocp_gclk>; /* icss_ocp */ 500 }; 501 }; 502 }; 503 504 pruss1_mii_rt: mii-rt@32000 { 505 compatible = "ti,pruss-mii", "syscon"; 506 reg = <0x32000 0x58>; 507 }; 508 509 pruss1_intc: interrupt-controller@20000 { 510 compatible = "ti,pruss-intc"; 511 reg = <0x20000 0x2000>; 512 interrupt-controller; 513 #interrupt-cells = <3>; 514 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>, 515 <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>, 516 <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>, 517 <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>, 518 <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>, 519 <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>, 520 <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; 521 interrupt-names = "host_intr0", "host_intr1", 522 "host_intr2", "host_intr3", 523 "host_intr4", 524 "host_intr6", "host_intr7"; 525 ti,irqs-reserved = /bits/ 8 <0x20>; /* BIT(5) */ 526 }; 527 528 pru1_0: pru@34000 { 529 compatible = "ti,am4376-pru"; 530 reg = <0x34000 0x3000>, 531 <0x22000 0x400>, 532 <0x22400 0x100>; 533 reg-names = "iram", "control", "debug"; 534 firmware-name = "am437x-pru1_0-fw"; 535 }; 536 537 pru1_1: pru@38000 { 538 compatible = "ti,am4376-pru"; 539 reg = <0x38000 0x3000>, 540 <0x24000 0x400>, 541 <0x24400 0x100>; 542 reg-names = "iram", "control", "debug"; 543 firmware-name = "am437x-pru1_1-fw"; 544 }; 545 546 pruss1_mdio: mdio@32400 { 547 compatible = "ti,davinci_mdio"; 548 reg = <0x32400 0x90>; 549 clocks = <&dpll_core_m4_ck>; 550 clock-names = "fck"; 551 bus_freq = <1000000>; 552 #address-cells = <1>; 553 #size-cells = <0>; 554 }; 555 }; 556 557... 558