xref: /linux/Documentation/devicetree/bindings/soc/ti/k3-ringacc.yaml (revision 0526b56cbc3c489642bd6a5fe4b718dea7ef0ee8)
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2# Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
3%YAML 1.2
4---
5$id: "http://devicetree.org/schemas/soc/ti/k3-ringacc.yaml#"
6$schema: "http://devicetree.org/meta-schemas/core.yaml#"
7
8title: Texas Instruments K3 NavigatorSS Ring Accelerator
9
10maintainers:
11  - Santosh Shilimkar <ssantosh@kernel.org>
12  - Grygorii Strashko <grygorii.strashko@ti.com>
13
14description: |
15  The Ring Accelerator (RA) is a machine which converts read/write accesses
16  from/to a constant address into corresponding read/write accesses from/to a
17  circular data structure in memory. The RA eliminates the need for each DMA
18  controller which needs to access ring elements from having to know the current
19  state of the ring (base address, current offset). The DMA controller
20  performs a read or write access to a specific address range (which maps to the
21  source interface on the RA) and the RA replaces the address for the transaction
22  with a new address which corresponds to the head or tail element of the ring
23  (head for reads, tail for writes).
24
25  The Ring Accelerator is a hardware module that is responsible for accelerating
26  management of the packet queues. The K3 SoCs can have more than one RA instances
27
28allOf:
29  - $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml#
30
31properties:
32  compatible:
33    items:
34      - const: ti,am654-navss-ringacc
35
36  reg:
37    items:
38      - description: real time registers regions
39      - description: fifos registers regions
40      - description: proxy gcfg registers regions
41      - description: proxy target registers regions
42
43  reg-names:
44    items:
45      - const: rt
46      - const: fifos
47      - const: proxy_gcfg
48      - const: proxy_target
49
50  msi-parent: true
51
52  ti,num-rings:
53    $ref: /schemas/types.yaml#/definitions/uint32
54    description: Number of rings supported by RA
55
56  ti,sci-rm-range-gp-rings:
57    $ref: /schemas/types.yaml#/definitions/uint32
58    description: TI-SCI RM subtype for GP ring range
59
60required:
61  - compatible
62  - reg
63  - reg-names
64  - msi-parent
65  - ti,num-rings
66  - ti,sci-rm-range-gp-rings
67  - ti,sci
68  - ti,sci-dev-id
69
70unevaluatedProperties: false
71
72examples:
73  - |
74    bus {
75        #address-cells = <2>;
76        #size-cells = <2>;
77
78        ringacc: ringacc@3c000000 {
79            compatible = "ti,am654-navss-ringacc";
80            reg = <0x0 0x3c000000 0x0 0x400000>,
81                  <0x0 0x38000000 0x0 0x400000>,
82                  <0x0 0x31120000 0x0 0x100>,
83                  <0x0 0x33000000 0x0 0x40000>;
84            reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target";
85            ti,num-rings = <818>;
86            ti,sci-rm-range-gp-rings = <0x2>; /* GP ring range */
87            ti,sci = <&dmsc>;
88            ti,sci-dev-id = <187>;
89            msi-parent = <&inta_main_udmass>;
90        };
91    };
92