1*436ebd32SThierry Reding# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*436ebd32SThierry Reding%YAML 1.2 3*436ebd32SThierry Reding--- 4*436ebd32SThierry Reding$id: http://devicetree.org/schemas/soc/tegra/nvidia,nvec.yaml# 5*436ebd32SThierry Reding$schema: http://devicetree.org/meta-schemas/core.yaml# 6*436ebd32SThierry Reding 7*436ebd32SThierry Redingtitle: NVIDIA compliant embedded controller 8*436ebd32SThierry Reding 9*436ebd32SThierry Redingmaintainers: 10*436ebd32SThierry Reding - Thierry Reding <thierry.reding@gmail.com> 11*436ebd32SThierry Reding - Jon Hunter <jonathanh@nvidia.com> 12*436ebd32SThierry Reding 13*436ebd32SThierry Redingproperties: 14*436ebd32SThierry Reding compatible: 15*436ebd32SThierry Reding const: nvidia,nvec 16*436ebd32SThierry Reding 17*436ebd32SThierry Reding reg: 18*436ebd32SThierry Reding maxItems: 1 19*436ebd32SThierry Reding 20*436ebd32SThierry Reding interrupts: 21*436ebd32SThierry Reding maxItems: 1 22*436ebd32SThierry Reding 23*436ebd32SThierry Reding clocks: 24*436ebd32SThierry Reding minItems: 1 25*436ebd32SThierry Reding items: 26*436ebd32SThierry Reding - description: divider clock 27*436ebd32SThierry Reding - description: fast clock 28*436ebd32SThierry Reding 29*436ebd32SThierry Reding clock-names: 30*436ebd32SThierry Reding minItems: 1 31*436ebd32SThierry Reding items: 32*436ebd32SThierry Reding - const: div-clk 33*436ebd32SThierry Reding - const: fast-clk 34*436ebd32SThierry Reding 35*436ebd32SThierry Reding resets: 36*436ebd32SThierry Reding items: 37*436ebd32SThierry Reding - description: module reset 38*436ebd32SThierry Reding 39*436ebd32SThierry Reding reset-names: 40*436ebd32SThierry Reding items: 41*436ebd32SThierry Reding - const: i2c 42*436ebd32SThierry Reding 43*436ebd32SThierry Reding clock-frequency: true 44*436ebd32SThierry Reding 45*436ebd32SThierry Reding request-gpios: 46*436ebd32SThierry Reding description: phandle to the GPIO used for EC request 47*436ebd32SThierry Reding 48*436ebd32SThierry Reding slave-addr: 49*436ebd32SThierry Reding $ref: /schemas/types.yaml#/definitions/uint32 50*436ebd32SThierry Reding description: I2C address of the slave controller 51*436ebd32SThierry Reding 52*436ebd32SThierry RedingadditionalProperties: false 53*436ebd32SThierry Reding 54*436ebd32SThierry Redingrequired: 55*436ebd32SThierry Reding - compatible 56*436ebd32SThierry Reding - reg 57*436ebd32SThierry Reding - interrupts 58*436ebd32SThierry Reding - clocks 59*436ebd32SThierry Reding - clock-names 60*436ebd32SThierry Reding - resets 61*436ebd32SThierry Reding - reset-names 62*436ebd32SThierry Reding - clock-frequency 63*436ebd32SThierry Reding - request-gpios 64*436ebd32SThierry Reding - slave-addr 65*436ebd32SThierry Reding 66*436ebd32SThierry Redingexamples: 67*436ebd32SThierry Reding - | 68*436ebd32SThierry Reding #include <dt-bindings/clock/tegra20-car.h> 69*436ebd32SThierry Reding #include <dt-bindings/gpio/tegra-gpio.h> 70*436ebd32SThierry Reding #include <dt-bindings/interrupt-controller/arm-gic.h> 71*436ebd32SThierry Reding 72*436ebd32SThierry Reding i2c@7000c500 { 73*436ebd32SThierry Reding compatible = "nvidia,nvec"; 74*436ebd32SThierry Reding reg = <0x7000c500 0x100>; 75*436ebd32SThierry Reding interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>; 76*436ebd32SThierry Reding clock-frequency = <80000>; 77*436ebd32SThierry Reding request-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>; 78*436ebd32SThierry Reding slave-addr = <138>; 79*436ebd32SThierry Reding clocks = <&tegra_car TEGRA20_CLK_I2C3>, 80*436ebd32SThierry Reding <&tegra_car TEGRA20_CLK_PLL_P_OUT3>; 81*436ebd32SThierry Reding clock-names = "div-clk", "fast-clk"; 82*436ebd32SThierry Reding resets = <&tegra_car 67>; 83*436ebd32SThierry Reding reset-names = "i2c"; 84*436ebd32SThierry Reding }; 85