1*c81f7845SWilliam Qiu# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2*c81f7845SWilliam Qiu%YAML 1.2 3*c81f7845SWilliam Qiu--- 4*c81f7845SWilliam Qiu$id: http://devicetree.org/schemas/soc/starfive/starfive,jh7110-syscon.yaml# 5*c81f7845SWilliam Qiu$schema: http://devicetree.org/meta-schemas/core.yaml# 6*c81f7845SWilliam Qiu 7*c81f7845SWilliam Qiutitle: StarFive JH7110 SoC system controller 8*c81f7845SWilliam Qiu 9*c81f7845SWilliam Qiumaintainers: 10*c81f7845SWilliam Qiu - William Qiu <william.qiu@starfivetech.com> 11*c81f7845SWilliam Qiu 12*c81f7845SWilliam Qiudescription: 13*c81f7845SWilliam Qiu The StarFive JH7110 SoC system controller provides register information such 14*c81f7845SWilliam Qiu as offset, mask and shift to configure related modules such as MMC and PCIe. 15*c81f7845SWilliam Qiu 16*c81f7845SWilliam Qiuproperties: 17*c81f7845SWilliam Qiu compatible: 18*c81f7845SWilliam Qiu oneOf: 19*c81f7845SWilliam Qiu - items: 20*c81f7845SWilliam Qiu - const: starfive,jh7110-sys-syscon 21*c81f7845SWilliam Qiu - const: syscon 22*c81f7845SWilliam Qiu - const: simple-mfd 23*c81f7845SWilliam Qiu - items: 24*c81f7845SWilliam Qiu - enum: 25*c81f7845SWilliam Qiu - starfive,jh7110-aon-syscon 26*c81f7845SWilliam Qiu - starfive,jh7110-stg-syscon 27*c81f7845SWilliam Qiu - const: syscon 28*c81f7845SWilliam Qiu 29*c81f7845SWilliam Qiu reg: 30*c81f7845SWilliam Qiu maxItems: 1 31*c81f7845SWilliam Qiu 32*c81f7845SWilliam Qiu clock-controller: 33*c81f7845SWilliam Qiu $ref: /schemas/clock/starfive,jh7110-pll.yaml# 34*c81f7845SWilliam Qiu type: object 35*c81f7845SWilliam Qiu 36*c81f7845SWilliam Qiu "#power-domain-cells": 37*c81f7845SWilliam Qiu const: 1 38*c81f7845SWilliam Qiu 39*c81f7845SWilliam Qiurequired: 40*c81f7845SWilliam Qiu - compatible 41*c81f7845SWilliam Qiu - reg 42*c81f7845SWilliam Qiu 43*c81f7845SWilliam QiuallOf: 44*c81f7845SWilliam Qiu - if: 45*c81f7845SWilliam Qiu properties: 46*c81f7845SWilliam Qiu compatible: 47*c81f7845SWilliam Qiu contains: 48*c81f7845SWilliam Qiu const: starfive,jh7110-sys-syscon 49*c81f7845SWilliam Qiu then: 50*c81f7845SWilliam Qiu required: 51*c81f7845SWilliam Qiu - clock-controller 52*c81f7845SWilliam Qiu else: 53*c81f7845SWilliam Qiu properties: 54*c81f7845SWilliam Qiu clock-controller: false 55*c81f7845SWilliam Qiu - if: 56*c81f7845SWilliam Qiu properties: 57*c81f7845SWilliam Qiu compatible: 58*c81f7845SWilliam Qiu contains: 59*c81f7845SWilliam Qiu const: starfive,jh7110-aon-syscon 60*c81f7845SWilliam Qiu then: 61*c81f7845SWilliam Qiu required: 62*c81f7845SWilliam Qiu - "#power-domain-cells" 63*c81f7845SWilliam Qiu else: 64*c81f7845SWilliam Qiu properties: 65*c81f7845SWilliam Qiu "#power-domain-cells": false 66*c81f7845SWilliam Qiu 67*c81f7845SWilliam QiuadditionalProperties: false 68*c81f7845SWilliam Qiu 69*c81f7845SWilliam Qiuexamples: 70*c81f7845SWilliam Qiu - | 71*c81f7845SWilliam Qiu syscon@10240000 { 72*c81f7845SWilliam Qiu compatible = "starfive,jh7110-stg-syscon", "syscon"; 73*c81f7845SWilliam Qiu reg = <0x10240000 0x1000>; 74*c81f7845SWilliam Qiu }; 75*c81f7845SWilliam Qiu 76*c81f7845SWilliam Qiu syscon@13030000 { 77*c81f7845SWilliam Qiu compatible = "starfive,jh7110-sys-syscon", "syscon", "simple-mfd"; 78*c81f7845SWilliam Qiu reg = <0x13030000 0x1000>; 79*c81f7845SWilliam Qiu 80*c81f7845SWilliam Qiu clock-controller { 81*c81f7845SWilliam Qiu compatible = "starfive,jh7110-pll"; 82*c81f7845SWilliam Qiu clocks = <&osc>; 83*c81f7845SWilliam Qiu #clock-cells = <1>; 84*c81f7845SWilliam Qiu }; 85*c81f7845SWilliam Qiu }; 86*c81f7845SWilliam Qiu 87*c81f7845SWilliam Qiu syscon@17010000 { 88*c81f7845SWilliam Qiu compatible = "starfive,jh7110-aon-syscon", "syscon"; 89*c81f7845SWilliam Qiu reg = <0x17010000 0x1000>; 90*c81f7845SWilliam Qiu #power-domain-cells = <1>; 91*c81f7845SWilliam Qiu }; 92*c81f7845SWilliam Qiu 93*c81f7845SWilliam Qiu... 94