1# SPDX-License-Identifier: GPL-2.0 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/soc/rockchip/grf.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Rockchip General Register Files (GRF) 8 9maintainers: 10 - Heiko Stuebner <heiko@sntech.de> 11 12properties: 13 compatible: 14 oneOf: 15 - items: 16 - enum: 17 - rockchip,rk3288-sgrf 18 - rockchip,rk3566-pipe-grf 19 - rockchip,rk3568-pcie3-phy-grf 20 - rockchip,rk3568-pipe-grf 21 - rockchip,rk3568-pipe-phy-grf 22 - rockchip,rk3568-usb2phy-grf 23 - rockchip,rk3588-bigcore0-grf 24 - rockchip,rk3588-bigcore1-grf 25 - rockchip,rk3588-hdptxphy-grf 26 - rockchip,rk3588-ioc 27 - rockchip,rk3588-php-grf 28 - rockchip,rk3588-pipe-phy-grf 29 - rockchip,rk3588-sys-grf 30 - rockchip,rk3588-pcie3-phy-grf 31 - rockchip,rk3588-pcie3-pipe-grf 32 - rockchip,rk3588-usb-grf 33 - rockchip,rk3588-usbdpphy-grf 34 - rockchip,rk3588-vo-grf 35 - rockchip,rk3588-vop-grf 36 - rockchip,rv1108-usbgrf 37 - const: syscon 38 - items: 39 - enum: 40 - rockchip,px30-grf 41 - rockchip,px30-pmugrf 42 - rockchip,px30-usb2phy-grf 43 - rockchip,rk3036-grf 44 - rockchip,rk3066-grf 45 - rockchip,rk3128-grf 46 - rockchip,rk3188-grf 47 - rockchip,rk3228-grf 48 - rockchip,rk3288-grf 49 - rockchip,rk3308-core-grf 50 - rockchip,rk3308-detect-grf 51 - rockchip,rk3308-grf 52 - rockchip,rk3308-usb2phy-grf 53 - rockchip,rk3328-grf 54 - rockchip,rk3328-usb2phy-grf 55 - rockchip,rk3368-grf 56 - rockchip,rk3368-pmugrf 57 - rockchip,rk3399-grf 58 - rockchip,rk3399-pmugrf 59 - rockchip,rk3568-grf 60 - rockchip,rk3568-pmugrf 61 - rockchip,rk3588-usb2phy-grf 62 - rockchip,rv1108-grf 63 - rockchip,rv1108-pmugrf 64 - rockchip,rv1126-grf 65 - rockchip,rv1126-pmugrf 66 - const: syscon 67 - const: simple-mfd 68 69 reg: 70 maxItems: 1 71 72 clocks: 73 maxItems: 1 74 75 "#address-cells": 76 const: 1 77 78 "#size-cells": 79 const: 1 80 81required: 82 - compatible 83 - reg 84 85additionalProperties: 86 type: object 87 88allOf: 89 - if: 90 properties: 91 compatible: 92 contains: 93 enum: 94 - rockchip,px30-grf 95 96 then: 97 properties: 98 lvds: 99 type: object 100 101 $ref: /schemas/display/rockchip/rockchip,lvds.yaml# 102 103 unevaluatedProperties: false 104 105 - if: 106 properties: 107 compatible: 108 contains: 109 const: rockchip,rk3288-grf 110 111 then: 112 properties: 113 edp-phy: 114 type: object 115 $ref: /schemas/phy/rockchip,rk3288-dp-phy.yaml# 116 unevaluatedProperties: false 117 118 - if: 119 properties: 120 compatible: 121 contains: 122 enum: 123 - rockchip,rk3066-grf 124 - rockchip,rk3188-grf 125 - rockchip,rk3288-grf 126 127 then: 128 properties: 129 usbphy: 130 type: object 131 132 $ref: /schemas/phy/rockchip-usb-phy.yaml# 133 134 unevaluatedProperties: false 135 136 - if: 137 properties: 138 compatible: 139 contains: 140 const: rockchip,rk3328-grf 141 142 then: 143 properties: 144 gpio: 145 type: object 146 147 $ref: /schemas/gpio/rockchip,rk3328-grf-gpio.yaml# 148 149 unevaluatedProperties: false 150 151 power-controller: 152 type: object 153 154 $ref: /schemas/power/rockchip,power-controller.yaml# 155 156 unevaluatedProperties: false 157 158 - if: 159 properties: 160 compatible: 161 contains: 162 const: rockchip,rk3399-grf 163 164 then: 165 properties: 166 mipi-dphy-rx0: 167 type: object 168 169 $ref: /schemas/phy/rockchip-mipi-dphy-rx0.yaml# 170 171 unevaluatedProperties: false 172 173 pcie-phy: 174 type: object 175 description: 176 Documentation/devicetree/bindings/phy/rockchip-pcie-phy.txt 177 178 patternProperties: 179 "^phy@[0-9a-f]+$": 180 type: object 181 $ref: /schemas/phy/rockchip,rk3399-emmc-phy.yaml# 182 unevaluatedProperties: false 183 184 - if: 185 properties: 186 compatible: 187 contains: 188 enum: 189 - rockchip,px30-pmugrf 190 - rockchip,rk3036-grf 191 - rockchip,rk3308-grf 192 - rockchip,rk3368-pmugrf 193 194 then: 195 properties: 196 reboot-mode: 197 type: object 198 199 $ref: /schemas/power/reset/syscon-reboot-mode.yaml# 200 201 unevaluatedProperties: false 202 203 - if: 204 properties: 205 compatible: 206 contains: 207 enum: 208 - rockchip,px30-usb2phy-grf 209 - rockchip,rk3128-grf 210 - rockchip,rk3228-grf 211 - rockchip,rk3308-usb2phy-grf 212 - rockchip,rk3328-usb2phy-grf 213 - rockchip,rk3399-grf 214 - rockchip,rk3588-usb2phy-grf 215 - rockchip,rv1108-grf 216 217 then: 218 required: 219 - "#address-cells" 220 - "#size-cells" 221 222 patternProperties: 223 "usb2phy@[0-9a-f]+$": 224 type: object 225 226 $ref: /schemas/phy/rockchip,inno-usb2phy.yaml# 227 228 unevaluatedProperties: false 229 230 - if: 231 properties: 232 compatible: 233 contains: 234 enum: 235 - rockchip,px30-grf 236 - rockchip,px30-pmugrf 237 - rockchip,rk3188-grf 238 - rockchip,rk3228-grf 239 - rockchip,rk3288-grf 240 - rockchip,rk3328-grf 241 - rockchip,rk3368-grf 242 - rockchip,rk3368-pmugrf 243 - rockchip,rk3399-grf 244 - rockchip,rk3399-pmugrf 245 - rockchip,rk3568-pmugrf 246 - rockchip,rk3588-pmugrf 247 - rockchip,rv1108-grf 248 - rockchip,rv1108-pmugrf 249 250 then: 251 properties: 252 io-domains: 253 type: object 254 255 $ref: /schemas/power/rockchip-io-domain.yaml# 256 257 unevaluatedProperties: false 258 259 - if: 260 properties: 261 compatible: 262 contains: 263 enum: 264 - rockchip,rk3588-vo-grf 265 266 then: 267 required: 268 - clocks 269 270 else: 271 properties: 272 clocks: false 273 274 275examples: 276 - | 277 #include <dt-bindings/clock/rk3399-cru.h> 278 #include <dt-bindings/interrupt-controller/arm-gic.h> 279 #include <dt-bindings/power/rk3399-power.h> 280 grf: syscon@ff770000 { 281 compatible = "rockchip,rk3399-grf", "syscon", "simple-mfd"; 282 reg = <0xff770000 0x10000>; 283 #address-cells = <1>; 284 #size-cells = <1>; 285 286 mipi_dphy_rx0: mipi-dphy-rx0 { 287 compatible = "rockchip,rk3399-mipi-dphy-rx0"; 288 clocks = <&cru SCLK_MIPIDPHY_REF>, 289 <&cru SCLK_DPHY_RX0_CFG>, 290 <&cru PCLK_VIO_GRF>; 291 clock-names = "dphy-ref", "dphy-cfg", "grf"; 292 power-domains = <&power RK3399_PD_VIO>; 293 #phy-cells = <0>; 294 }; 295 296 phy@f780 { 297 compatible = "rockchip,rk3399-emmc-phy"; 298 reg = <0xf780 0x20>; 299 clocks = <&sdhci>; 300 clock-names = "emmcclk"; 301 drive-impedance-ohm = <50>; 302 #phy-cells = <0>; 303 }; 304 305 u2phy0: usb2phy@e450 { 306 compatible = "rockchip,rk3399-usb2phy"; 307 reg = <0xe450 0x10>; 308 clocks = <&cru SCLK_USB2PHY0_REF>; 309 clock-names = "phyclk"; 310 #clock-cells = <0>; 311 clock-output-names = "clk_usbphy0_480m"; 312 313 u2phy0_host: host-port { 314 #phy-cells = <0>; 315 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH 0>; 316 interrupt-names = "linestate"; 317 }; 318 319 u2phy0_otg: otg-port { 320 #phy-cells = <0>; 321 interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH 0>, 322 <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH 0>, 323 <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH 0>; 324 interrupt-names = "otg-bvalid", "otg-id", 325 "linestate"; 326 }; 327 }; 328 }; 329