xref: /linux/Documentation/devicetree/bindings/soc/renesas/renesas,r9a09g057-sys.yaml (revision 184e56e77c06a7eef68a021e9d4b11a11a8ab096) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/soc/renesas/renesas,r9a09g057-sys.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Renesas RZ/V2H(P) System Controller (SYS)
8
9maintainers:
10  - Geert Uytterhoeven <geert+renesas@glider.be>
11
12description: |
13  The RZ/V2H(P) SYS (System Controller) controls the overall
14  configuration of the LSI and supports the following functions,
15  - Trust zone control
16  - Extend access by specific masters to address beyond 4GB space
17  - GBETH configuration
18  - Control of settings and states of SRAM/PCIe/CM33/CA55/CR8/xSPI/ADC/TSU
19  - LSI version
20  - WDT stop control
21  - General registers
22
23properties:
24  compatible:
25    items:
26      - enum:
27          - renesas,r9a09g047-sys # RZ/G3E
28          - renesas,r9a09g057-sys # RZ/V2H
29
30  reg:
31    maxItems: 1
32
33  clocks:
34    maxItems: 1
35
36  resets:
37    maxItems: 1
38
39required:
40  - compatible
41  - reg
42  - clocks
43  - resets
44
45additionalProperties: false
46
47examples:
48  - |
49    sys: system-controller@10430000 {
50        compatible = "renesas,r9a09g057-sys";
51        reg = <0x10430000 0x10000>;
52        clocks = <&cpg 1>;
53        resets = <&cpg 1>;
54    };
55