1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/soc/mediatek/mediatek,pwrap.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Mediatek PMIC Wrapper 8 9maintainers: 10 - Flora Fu <flora.fu@mediatek.com> 11 - Alexandre Mergnat <amergnat@baylibre.com> 12 13description: 14 On MediaTek SoCs the PMIC is connected via SPI. The SPI master interface 15 is not directly visible to the CPU, but only through the PMIC wrapper 16 inside the SoC. The communication between the SoC and the PMIC can 17 optionally be encrypted. Also a non standard Dual IO SPI mode can be 18 used to increase speed. 19 20 IP Pairing 21 22 On MT8135 the pins of some SoC internal peripherals can be on the PMIC. 23 The signals of these pins are routed over the SPI bus using the pwrap 24 bridge. In the binding description below the properties needed for bridging 25 are marked with "IP Pairing". These are optional on SoCs which do not support 26 IP Pairing 27 28properties: 29 compatible: 30 oneOf: 31 - items: 32 - enum: 33 - mediatek,mt2701-pwrap 34 - mediatek,mt6765-pwrap 35 - mediatek,mt6779-pwrap 36 - mediatek,mt6795-pwrap 37 - mediatek,mt6797-pwrap 38 - mediatek,mt6873-pwrap 39 - mediatek,mt7622-pwrap 40 - mediatek,mt8135-pwrap 41 - mediatek,mt8173-pwrap 42 - mediatek,mt8183-pwrap 43 - mediatek,mt8186-pwrap 44 - mediatek,mt8195-pwrap 45 - mediatek,mt8365-pwrap 46 - mediatek,mt8516-pwrap 47 - items: 48 - enum: 49 - mediatek,mt8186-pwrap 50 - mediatek,mt8195-pwrap 51 - const: syscon 52 - items: 53 - enum: 54 - mediatek,mt8188-pwrap 55 - mediatek,mt8189-pwrap 56 - const: mediatek,mt8195-pwrap 57 - const: syscon 58 59 reg: 60 minItems: 1 61 items: 62 - description: PMIC wrapper registers 63 - description: IP pairing registers 64 65 reg-names: 66 minItems: 1 67 items: 68 - const: pwrap 69 - const: pwrap-bridge 70 71 interrupts: 72 maxItems: 1 73 74 clocks: 75 minItems: 2 76 items: 77 - description: SPI bus clock 78 - description: Main module clock 79 - description: System module clock 80 - description: Timer module clock 81 82 clock-names: 83 minItems: 2 84 items: 85 - const: spi 86 - const: wrap 87 - const: sys 88 - const: tmr 89 90 resets: 91 minItems: 1 92 items: 93 - description: PMIC wrapper reset 94 - description: IP pairing reset 95 96 reset-names: 97 minItems: 1 98 items: 99 - const: pwrap 100 - const: pwrap-bridge 101 102 power-domains: 103 maxItems: 1 104 105 pmic: 106 type: object 107 108required: 109 - compatible 110 - reg 111 - reg-names 112 - interrupts 113 - clocks 114 - clock-names 115 116dependentRequired: 117 resets: [reset-names] 118 119allOf: 120 - if: 121 properties: 122 compatible: 123 contains: 124 const: mediatek,mt8365-pwrap 125 then: 126 properties: 127 clocks: 128 minItems: 4 129 130 clock-names: 131 minItems: 4 132 133 - if: 134 properties: 135 compatible: 136 contains: 137 const: mediatek,mt8173-pwrap 138 then: 139 properties: 140 power-domains: true 141 else: 142 properties: 143 power-domains: false 144 145additionalProperties: false 146 147examples: 148 - | 149 #include <dt-bindings/interrupt-controller/irq.h> 150 #include <dt-bindings/interrupt-controller/arm-gic.h> 151 #include <dt-bindings/reset/mt8135-resets.h> 152 153 soc { 154 #address-cells = <2>; 155 #size-cells = <2>; 156 pwrap@1000f000 { 157 compatible = "mediatek,mt8135-pwrap"; 158 reg = <0 0x1000f000 0 0x1000>, 159 <0 0x11017000 0 0x1000>; 160 reg-names = "pwrap", "pwrap-bridge"; 161 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>; 162 clocks = <&clk26m>, <&clk26m>; 163 clock-names = "spi", "wrap"; 164 resets = <&infracfg MT8135_INFRA_PMIC_WRAP_RST>, 165 <&pericfg MT8135_PERI_PWRAP_BRIDGE_SW_RST>; 166 reset-names = "pwrap", "pwrap-bridge"; 167 }; 168 }; 169