xref: /linux/Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-hsio-blk-ctrl.yaml (revision 3286f88f31da060ac2789cee247153961ba57e49) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/soc/imx/fsl,imx8mp-hsio-blk-ctrl.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: NXP i.MX8MP HSIO blk-ctrl
8
9maintainers:
10  - Lucas Stach <l.stach@pengutronix.de>
11
12description:
13  The i.MX8MP HSIO blk-ctrl is a top-level peripheral providing access to
14  the NoC and ensuring proper power sequencing of the high-speed IO
15  (USB an PCIe) peripherals located in the HSIO domain of the SoC.
16
17properties:
18  compatible:
19    items:
20      - const: fsl,imx8mp-hsio-blk-ctrl
21      - const: syscon
22
23  reg:
24    maxItems: 1
25
26  '#power-domain-cells':
27    const: 1
28
29  power-domains:
30    minItems: 6
31    maxItems: 6
32
33  power-domain-names:
34    items:
35      - const: bus
36      - const: usb
37      - const: usb-phy1
38      - const: usb-phy2
39      - const: pcie
40      - const: pcie-phy
41
42  '#clock-cells':
43    const: 0
44
45  clocks:
46    minItems: 2
47    maxItems: 2
48
49  clock-names:
50    items:
51      - const: usb
52      - const: pcie
53
54  interconnects:
55    maxItems: 4
56
57  interconnect-names:
58    items:
59      - const: noc-pcie
60      - const: usb1
61      - const: usb2
62      - const: pcie
63
64required:
65  - compatible
66  - reg
67  - power-domains
68  - power-domain-names
69  - clocks
70  - clock-names
71
72additionalProperties: false
73
74examples:
75  - |
76    #include <dt-bindings/clock/imx8mp-clock.h>
77    #include <dt-bindings/power/imx8mp-power.h>
78
79    blk-ctrl@32f10000 {
80        compatible = "fsl,imx8mp-hsio-blk-ctrl", "syscon";
81        reg = <0x32f10000 0x24>;
82        clocks = <&clk IMX8MP_CLK_USB_ROOT>,
83                 <&clk IMX8MP_CLK_PCIE_ROOT>;
84        clock-names = "usb", "pcie";
85        power-domains = <&pgc_hsiomix>, <&pgc_hsiomix>,
86                        <&pgc_usb1_phy>, <&pgc_usb2_phy>,
87                        <&pgc_hsiomix>, <&pgc_pcie_phy>;
88        power-domain-names = "bus", "usb", "usb-phy1",
89                             "usb-phy2", "pcie", "pcie-phy";
90        #power-domain-cells = <1>;
91        #clock-cells = <0>;
92    };
93