xref: /linux/Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-hdmi-blk-ctrl.yaml (revision c532de5a67a70f8533d495f8f2aaa9a0491c3ad0) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/soc/imx/fsl,imx8mp-hdmi-blk-ctrl.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: NXP i.MX8MP HDMI blk-ctrl
8
9maintainers:
10  - Lucas Stach <l.stach@pengutronix.de>
11
12description:
13  The i.MX8MP HDMMI blk-ctrl is a top-level peripheral providing access to
14  the NoC and ensuring proper power sequencing of the display pipeline
15  peripherals located in the HDMI domain of the SoC.
16
17properties:
18  compatible:
19    items:
20      - const: fsl,imx8mp-hdmi-blk-ctrl
21      - const: syscon
22
23  reg:
24    maxItems: 1
25
26  '#power-domain-cells':
27    const: 1
28
29  power-domains:
30    minItems: 10
31    maxItems: 10
32
33  power-domain-names:
34    items:
35      - const: bus
36      - const: irqsteer
37      - const: lcdif
38      - const: pai
39      - const: pvi
40      - const: trng
41      - const: hdmi-tx
42      - const: hdmi-tx-phy
43      - const: hdcp
44      - const: hrv
45
46  clocks:
47    minItems: 5
48    maxItems: 5
49
50  clock-names:
51    items:
52      - const: apb
53      - const: axi
54      - const: ref_266m
55      - const: ref_24m
56      - const: fdcc
57
58  interconnects:
59    maxItems: 3
60
61  interconnect-names:
62    items:
63      - const: hrv
64      - const: lcdif-hdmi
65      - const: hdcp
66
67required:
68  - compatible
69  - reg
70  - power-domains
71  - power-domain-names
72  - clocks
73  - clock-names
74
75additionalProperties: false
76
77examples:
78  - |
79    #include <dt-bindings/clock/imx8mp-clock.h>
80    #include <dt-bindings/power/imx8mp-power.h>
81
82    blk-ctrl@32fc0000 {
83        compatible = "fsl,imx8mp-hdmi-blk-ctrl", "syscon";
84        reg = <0x32fc0000 0x23c>;
85        clocks = <&clk IMX8MP_CLK_HDMI_APB>,
86                 <&clk IMX8MP_CLK_HDMI_ROOT>,
87                 <&clk IMX8MP_CLK_HDMI_REF_266M>,
88                 <&clk IMX8MP_CLK_HDMI_24M>,
89                 <&clk IMX8MP_CLK_HDMI_FDCC_TST>;
90        clock-names = "apb", "axi", "ref_266m", "ref_24m", "fdcc";
91        power-domains = <&pgc_hdmimix>, <&pgc_hdmimix>, <&pgc_hdmimix>,
92                        <&pgc_hdmimix>, <&pgc_hdmimix>, <&pgc_hdmimix>,
93                        <&pgc_hdmimix>, <&pgc_hdmi_phy>,
94                        <&pgc_hdmimix>, <&pgc_hdmimix>;
95        power-domain-names = "bus", "irqsteer", "lcdif", "pai", "pvi", "trng",
96                             "hdmi-tx", "hdmi-tx-phy",
97                             "hdcp", "hrv";
98        #power-domain-cells = <1>;
99    };
100