xref: /linux/Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-media-blk-ctrl.yaml (revision 0d2c843ce5adbe98998844613eb8a8e1127616fd)
18b3dd27bSPaul Elder# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
28b3dd27bSPaul Elder%YAML 1.2
38b3dd27bSPaul Elder---
48b3dd27bSPaul Elder$id: http://devicetree.org/schemas/soc/imx/fsl,imx8mp-media-blk-ctrl.yaml#
58b3dd27bSPaul Elder$schema: http://devicetree.org/meta-schemas/core.yaml#
68b3dd27bSPaul Elder
78b3dd27bSPaul Eldertitle: NXP i.MX8MP Media Block Control
88b3dd27bSPaul Elder
98b3dd27bSPaul Eldermaintainers:
108b3dd27bSPaul Elder  - Paul Elder <paul.elder@ideasonboard.com>
118b3dd27bSPaul Elder
128b3dd27bSPaul Elderdescription:
138b3dd27bSPaul Elder  The i.MX8MP Media Block Control (MEDIA BLK_CTRL) is a top-level peripheral
148b3dd27bSPaul Elder  providing access to the NoC and ensuring proper power sequencing of the
158b3dd27bSPaul Elder  peripherals within the MEDIAMIX domain.
168b3dd27bSPaul Elder
178b3dd27bSPaul Elderproperties:
188b3dd27bSPaul Elder  compatible:
198b3dd27bSPaul Elder    items:
208b3dd27bSPaul Elder      - const: fsl,imx8mp-media-blk-ctrl
218b3dd27bSPaul Elder      - const: syscon
228b3dd27bSPaul Elder
238b3dd27bSPaul Elder  reg:
248b3dd27bSPaul Elder    maxItems: 1
258b3dd27bSPaul Elder
268b3dd27bSPaul Elder  '#power-domain-cells':
278b3dd27bSPaul Elder    const: 1
288b3dd27bSPaul Elder
298b3dd27bSPaul Elder  power-domains:
308b3dd27bSPaul Elder    maxItems: 10
318b3dd27bSPaul Elder
328b3dd27bSPaul Elder  power-domain-names:
338b3dd27bSPaul Elder    items:
348b3dd27bSPaul Elder      - const: bus
358b3dd27bSPaul Elder      - const: mipi-dsi1
368b3dd27bSPaul Elder      - const: mipi-csi1
378b3dd27bSPaul Elder      - const: lcdif1
388b3dd27bSPaul Elder      - const: isi
398b3dd27bSPaul Elder      - const: mipi-csi2
408b3dd27bSPaul Elder      - const: lcdif2
418b3dd27bSPaul Elder      - const: isp
428b3dd27bSPaul Elder      - const: dwe
438b3dd27bSPaul Elder      - const: mipi-dsi2
448b3dd27bSPaul Elder
458b3dd27bSPaul Elder  clocks:
468b3dd27bSPaul Elder    items:
478b3dd27bSPaul Elder      - description: The APB clock
488b3dd27bSPaul Elder      - description: The AXI clock
498b3dd27bSPaul Elder      - description: The pixel clock for the first CSI2 receiver (aclk)
508b3dd27bSPaul Elder      - description: The pixel clock for the second CSI2 receiver (aclk)
518b3dd27bSPaul Elder      - description: The pixel clock for the first LCDIF (pix_clk)
528b3dd27bSPaul Elder      - description: The pixel clock for the second LCDIF (pix_clk)
538b3dd27bSPaul Elder      - description: The core clock for the ISP (clk)
548b3dd27bSPaul Elder      - description: The MIPI-PHY reference clock used by DSI
558b3dd27bSPaul Elder
568b3dd27bSPaul Elder  clock-names:
578b3dd27bSPaul Elder    items:
588b3dd27bSPaul Elder      - const: apb
598b3dd27bSPaul Elder      - const: axi
608b3dd27bSPaul Elder      - const: cam1
618b3dd27bSPaul Elder      - const: cam2
628b3dd27bSPaul Elder      - const: disp1
638b3dd27bSPaul Elder      - const: disp2
648b3dd27bSPaul Elder      - const: isp
658b3dd27bSPaul Elder      - const: phy
668b3dd27bSPaul Elder
676ad45d25SPeng Fan  interconnects:
686ad45d25SPeng Fan    maxItems: 8
696ad45d25SPeng Fan
706ad45d25SPeng Fan  interconnect-names:
716ad45d25SPeng Fan    items:
726ad45d25SPeng Fan      - const: lcdif-rd
736ad45d25SPeng Fan      - const: lcdif-wr
746ad45d25SPeng Fan      - const: isi0
756ad45d25SPeng Fan      - const: isi1
766ad45d25SPeng Fan      - const: isi2
776ad45d25SPeng Fan      - const: isp0
786ad45d25SPeng Fan      - const: isp1
796ad45d25SPeng Fan      - const: dwe
806ad45d25SPeng Fan
818b3dd27bSPaul Elderrequired:
828b3dd27bSPaul Elder  - compatible
838b3dd27bSPaul Elder  - reg
848b3dd27bSPaul Elder  - '#power-domain-cells'
858b3dd27bSPaul Elder  - power-domains
868b3dd27bSPaul Elder  - power-domain-names
878b3dd27bSPaul Elder  - clocks
888b3dd27bSPaul Elder  - clock-names
898b3dd27bSPaul Elder
908b3dd27bSPaul ElderadditionalProperties: false
918b3dd27bSPaul Elder
928b3dd27bSPaul Elderexamples:
938b3dd27bSPaul Elder  - |
948b3dd27bSPaul Elder    #include <dt-bindings/clock/imx8mp-clock.h>
958b3dd27bSPaul Elder    #include <dt-bindings/power/imx8mp-power.h>
968b3dd27bSPaul Elder
97*0d2c843cSMarek Vasut    blk-ctrl@32ec0000 {
988b3dd27bSPaul Elder        compatible = "fsl,imx8mp-media-blk-ctrl", "syscon";
998b3dd27bSPaul Elder        reg = <0x32ec0000 0x138>;
1008b3dd27bSPaul Elder        power-domains = <&mediamix_pd>, <&mipi_phy1_pd>, <&mipi_phy1_pd>,
1018b3dd27bSPaul Elder                        <&mediamix_pd>, <&mediamix_pd>, <&mipi_phy2_pd>,
1028b3dd27bSPaul Elder                        <&mediamix_pd>, <&ispdwp_pd>, <&ispdwp_pd>,
1038b3dd27bSPaul Elder                        <&mipi_phy2_pd>;
1048b3dd27bSPaul Elder        power-domain-names = "bus", "mipi-dsi1", "mipi-csi1", "lcdif1", "isi",
10515e1a9bcSLaurent Pinchart                             "mipi-csi2", "lcdif2", "isp", "dwe", "mipi-dsi2";
1068b3dd27bSPaul Elder        clocks = <&clk IMX8MP_CLK_MEDIA_APB_ROOT>,
1078b3dd27bSPaul Elder                 <&clk IMX8MP_CLK_MEDIA_AXI_ROOT>,
1088b3dd27bSPaul Elder                 <&clk IMX8MP_CLK_MEDIA_CAM1_PIX_ROOT>,
1098b3dd27bSPaul Elder                 <&clk IMX8MP_CLK_MEDIA_CAM2_PIX_ROOT>,
1108b3dd27bSPaul Elder                 <&clk IMX8MP_CLK_MEDIA_DISP1_PIX_ROOT>,
1118b3dd27bSPaul Elder                 <&clk IMX8MP_CLK_MEDIA_DISP2_PIX_ROOT>,
1128b3dd27bSPaul Elder                 <&clk IMX8MP_CLK_MEDIA_ISP_ROOT>,
1138b3dd27bSPaul Elder                 <&clk IMX8MP_CLK_MEDIA_MIPI_PHY1_REF_ROOT>;
1148b3dd27bSPaul Elder        clock-names = "apb", "axi", "cam1", "cam2", "disp1", "disp2",
1158b3dd27bSPaul Elder                      "isp", "phy";
1168b3dd27bSPaul Elder        #power-domain-cells = <1>;
1178b3dd27bSPaul Elder    };
1188b3dd27bSPaul Elder...
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