1*a8c759c7Syangbo lu* Global Utilities Block 2*a8c759c7Syangbo lu 3*a8c759c7Syangbo luThe global utilities block controls power management, I/O device 4*a8c759c7Syangbo luenabling, power-on-reset configuration monitoring, general-purpose 5*a8c759c7Syangbo luI/O signal configuration, alternate function selection for multiplexed 6*a8c759c7Syangbo lusignals, and clock control. 7*a8c759c7Syangbo lu 8*a8c759c7Syangbo luRequired properties: 9*a8c759c7Syangbo lu 10*a8c759c7Syangbo lu - compatible : Should define the compatible device type for 11*a8c759c7Syangbo lu global-utilities. 12*a8c759c7Syangbo lu Possible compatibles: 13*a8c759c7Syangbo lu "fsl,qoriq-device-config-1.0" 14*a8c759c7Syangbo lu "fsl,qoriq-device-config-2.0" 15*a8c759c7Syangbo lu "fsl,<chip>-device-config" 16*a8c759c7Syangbo lu "fsl,<chip>-guts" 17*a8c759c7Syangbo lu - reg : Offset and length of the register set for the device. 18*a8c759c7Syangbo lu 19*a8c759c7Syangbo luRecommended properties: 20*a8c759c7Syangbo lu 21*a8c759c7Syangbo lu - fsl,has-rstcr : Indicates that the global utilities register set 22*a8c759c7Syangbo lu contains a functioning "reset control register" (i.e. the board 23*a8c759c7Syangbo lu is wired to reset upon setting the HRESET_REQ bit in this register). 24*a8c759c7Syangbo lu 25*a8c759c7Syangbo lu - fsl,liodn-bits : Indicates the number of defined bits in the LIODN 26*a8c759c7Syangbo lu registers, for those SOCs that have a PAMU device. 27*a8c759c7Syangbo lu 28*a8c759c7Syangbo lu - little-endian : Indicates that the global utilities block is little 29*a8c759c7Syangbo lu endian. The default is big endian. 30*a8c759c7Syangbo lu 31*a8c759c7Syangbo luExamples: 32*a8c759c7Syangbo lu global-utilities@e0000 { /* global utilities block */ 33*a8c759c7Syangbo lu compatible = "fsl,mpc8548-guts"; 34*a8c759c7Syangbo lu reg = <e0000 1000>; 35*a8c759c7Syangbo lu fsl,has-rstcr; 36*a8c759c7Syangbo lu }; 37*a8c759c7Syangbo lu 38*a8c759c7Syangbo lu guts: global-utilities@e0000 { 39*a8c759c7Syangbo lu compatible = "fsl,qoriq-device-config-1.0"; 40*a8c759c7Syangbo lu reg = <0xe0000 0xe00>; 41*a8c759c7Syangbo lu fsl,has-rstcr; 42*a8c759c7Syangbo lu #sleep-cells = <1>; 43*a8c759c7Syangbo lu fsl,liodn-bits = <12>; 44*a8c759c7Syangbo lu }; 45