1# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/slimbus/qcom,slim.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm SoC SLIMbus controller 8 9maintainers: 10 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> 11 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org> 12 13description: 14 SLIMbus controller used when applications processor controls SLIMbus master 15 component. 16 17allOf: 18 - $ref: slimbus.yaml# 19 20properties: 21 compatible: 22 items: 23 - enum: 24 - qcom,apq8064-slim 25 - const: qcom,slim 26 27 reg: 28 items: 29 - description: Physical address of controller register blocks 30 - description: SLEW RATE register 31 32 reg-names: 33 items: 34 - const: ctrl 35 - const: slew 36 37 clocks: 38 items: 39 - description: Interface clock for this controller 40 - description: Interrupt for controller core's BAM 41 42 clock-names: 43 items: 44 - const: iface 45 - const: core 46 47 interrupts: 48 maxItems: 1 49 50required: 51 - compatible 52 - reg 53 - reg-names 54 - clocks 55 - clock-names 56 - interrupts 57 58unevaluatedProperties: false 59 60examples: 61 - | 62 #include <dt-bindings/clock/qcom,gcc-msm8960.h> 63 #include <dt-bindings/clock/qcom,lcc-msm8960.h> 64 #include <dt-bindings/interrupt-controller/arm-gic.h> 65 66 soc { 67 #address-cells = <1>; 68 #size-cells = <1>; 69 ranges; 70 71 slim@28080000 { 72 compatible = "qcom,apq8064-slim", "qcom,slim"; 73 reg = <0x28080000 0x2000>, <0x80207c 4>; 74 reg-names = "ctrl", "slew"; 75 interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; 76 clocks = <&lcc SLIMBUS_SRC>, <&lcc AUDIO_SLIMBUS_CLK>; 77 clock-names = "iface", "core"; 78 #address-cells = <2>; 79 #size-cells = <0>; 80 81 audio-codec@1,0 { 82 compatible = "slim217,60"; 83 reg = <1 0>; 84 }; 85 }; 86 }; 87