1# SPDX-License-Identifier: GPL-2.0 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/serial/snps-dw-apb-uart.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Synopsys DesignWare ABP UART 8 9maintainers: 10 - Rob Herring <robh@kernel.org> 11 12allOf: 13 - $ref: serial.yaml# 14 - $ref: rs485.yaml# 15 16 - if: 17 properties: 18 compatible: 19 items: 20 - {} 21 - const: renesas,rzn1-uart 22 - const: snps,dw-apb-uart 23 then: 24 properties: 25 dmas: false 26 dma-names: false 27 28 - if: 29 properties: 30 compatible: 31 contains: 32 const: starfive,jh7110-uart 33 then: 34 properties: 35 resets: 36 minItems: 2 37 else: 38 properties: 39 resets: 40 maxItems: 1 41 42properties: 43 compatible: 44 oneOf: 45 - items: 46 - const: renesas,r9a06g032-uart 47 - const: renesas,rzn1-uart 48 - const: snps,dw-apb-uart 49 - items: 50 - const: renesas,r9a06g032-uart 51 - const: renesas,rzn1-uart 52 - items: 53 - enum: 54 - anlogic,dr1v90-uart 55 - brcm,bcm11351-dw-apb-uart 56 - brcm,bcm21664-dw-apb-uart 57 - rockchip,px30-uart 58 - rockchip,rk1808-uart 59 - rockchip,rk3036-uart 60 - rockchip,rk3066-uart 61 - rockchip,rk3128-uart 62 - rockchip,rk3188-uart 63 - rockchip,rk3288-uart 64 - rockchip,rk3308-uart 65 - rockchip,rk3328-uart 66 - rockchip,rk3368-uart 67 - rockchip,rk3399-uart 68 - rockchip,rk3506-uart 69 - rockchip,rk3528-uart 70 - rockchip,rk3562-uart 71 - rockchip,rk3568-uart 72 - rockchip,rk3576-uart 73 - rockchip,rk3588-uart 74 - rockchip,rv1108-uart 75 - rockchip,rv1126-uart 76 - sophgo,sg2044-uart 77 - starfive,jh7100-hsuart 78 - starfive,jh7100-uart 79 - starfive,jh7110-uart 80 - const: snps,dw-apb-uart 81 - const: snps,dw-apb-uart 82 83 reg: 84 maxItems: 1 85 86 interrupts: 87 maxItems: 1 88 89 clock-frequency: true 90 91 clocks: 92 minItems: 1 93 maxItems: 2 94 95 clock-names: 96 items: 97 - const: baudclk 98 - const: apb_pclk 99 100 dmas: 101 maxItems: 2 102 103 dma-names: 104 items: 105 - const: tx 106 - const: rx 107 108 snps,uart-16550-compatible: 109 description: reflects the value of UART_16550_COMPATIBLE configuration 110 parameter. Define this if your UART does not implement the busy functionality. 111 type: boolean 112 113 power-domains: 114 maxItems: 1 115 116 resets: 117 minItems: 1 118 maxItems: 2 119 120 reg-shift: true 121 122 reg-io-width: true 123 124 dcd-override: 125 description: Override the DCD modem status signal. This signal will 126 always be reported as active instead of being obtained from the modem 127 status register. Define this if your serial port does not use this 128 pin. 129 type: boolean 130 131 dsr-override: 132 description: Override the DTS modem status signal. This signal will 133 always be reported as active instead of being obtained from the modem 134 status register. Define this if your serial port does not use this 135 pin. 136 type: boolean 137 138 cts-override: 139 description: Override the CTS modem status signal. This signal will 140 always be reported as active instead of being obtained from the modem 141 status register. Define this if your serial port does not use this 142 pin. 143 type: boolean 144 145 ri-override: 146 description: Override the RI modem status signal. This signal will always 147 be reported as inactive instead of being obtained from the modem status 148 register. Define this if your serial port does not use this pin. 149 type: boolean 150 151required: 152 - compatible 153 - reg 154 155unevaluatedProperties: false 156 157examples: 158 - | 159 serial@80230000 { 160 compatible = "snps,dw-apb-uart"; 161 reg = <0x80230000 0x100>; 162 clock-frequency = <3686400>; 163 interrupts = <10>; 164 reg-shift = <2>; 165 reg-io-width = <4>; 166 dcd-override; 167 dsr-override; 168 cts-override; 169 ri-override; 170 }; 171 172 - | 173 // Example with one clock: 174 serial@80230000 { 175 compatible = "snps,dw-apb-uart"; 176 reg = <0x80230000 0x100>; 177 clocks = <&baudclk>; 178 interrupts = <10>; 179 reg-shift = <2>; 180 reg-io-width = <4>; 181 }; 182 183 - | 184 // Example with two clocks: 185 serial@80230000 { 186 compatible = "snps,dw-apb-uart"; 187 reg = <0x80230000 0x100>; 188 clocks = <&baudclk>, <&apb_pclk>; 189 clock-names = "baudclk", "apb_pclk"; 190 interrupts = <10>; 191 reg-shift = <2>; 192 reg-io-width = <4>; 193 }; 194... 195