1# SPDX-License-Identifier: GPL-2.0 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/serial/snps-dw-apb-uart.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Synopsys DesignWare ABP UART 8 9maintainers: 10 - Rob Herring <robh@kernel.org> 11 12allOf: 13 - $ref: serial.yaml# 14 - $ref: rs485.yaml# 15 16 - if: 17 properties: 18 compatible: 19 items: 20 - {} 21 - const: renesas,rzn1-uart 22 - const: snps,dw-apb-uart 23 then: 24 properties: 25 dmas: false 26 dma-names: false 27 28 - if: 29 properties: 30 compatible: 31 contains: 32 const: starfive,jh7110-uart 33 then: 34 properties: 35 resets: 36 minItems: 2 37 else: 38 properties: 39 resets: 40 maxItems: 1 41 42properties: 43 compatible: 44 oneOf: 45 - items: 46 - const: renesas,r9a06g032-uart 47 - const: renesas,rzn1-uart 48 - const: snps,dw-apb-uart 49 - items: 50 - const: renesas,r9a06g032-uart 51 - const: renesas,rzn1-uart 52 - items: 53 - enum: 54 - anlogic,dr1v90-uart 55 - brcm,bcm11351-dw-apb-uart 56 - brcm,bcm21664-dw-apb-uart 57 - rockchip,px30-uart 58 - rockchip,rk1808-uart 59 - rockchip,rk3036-uart 60 - rockchip,rk3066-uart 61 - rockchip,rk3128-uart 62 - rockchip,rk3188-uart 63 - rockchip,rk3288-uart 64 - rockchip,rk3308-uart 65 - rockchip,rk3328-uart 66 - rockchip,rk3368-uart 67 - rockchip,rk3399-uart 68 - rockchip,rk3506-uart 69 - rockchip,rk3528-uart 70 - rockchip,rk3562-uart 71 - rockchip,rk3568-uart 72 - rockchip,rk3576-uart 73 - rockchip,rk3588-uart 74 - rockchip,rv1103b-uart 75 - rockchip,rv1108-uart 76 - rockchip,rv1126-uart 77 - sophgo,sg2044-uart 78 - starfive,jh7100-hsuart 79 - starfive,jh7100-uart 80 - starfive,jh7110-uart 81 - ultrarisc,dp1000-uart 82 - const: snps,dw-apb-uart 83 - const: snps,dw-apb-uart 84 85 reg: 86 maxItems: 1 87 88 interrupts: 89 maxItems: 1 90 91 clock-frequency: true 92 93 clocks: 94 minItems: 1 95 maxItems: 2 96 97 clock-names: 98 items: 99 - const: baudclk 100 - const: apb_pclk 101 102 dmas: 103 maxItems: 2 104 105 dma-names: 106 items: 107 - const: tx 108 - const: rx 109 110 snps,uart-16550-compatible: 111 description: reflects the value of UART_16550_COMPATIBLE configuration 112 parameter. Define this if your UART does not implement the busy functionality. 113 type: boolean 114 115 power-domains: 116 maxItems: 1 117 118 resets: 119 minItems: 1 120 maxItems: 2 121 122 reg-shift: true 123 124 reg-io-width: true 125 126 dcd-override: 127 description: Override the DCD modem status signal. This signal will 128 always be reported as active instead of being obtained from the modem 129 status register. Define this if your serial port does not use this 130 pin. 131 type: boolean 132 133 dsr-override: 134 description: Override the DTS modem status signal. This signal will 135 always be reported as active instead of being obtained from the modem 136 status register. Define this if your serial port does not use this 137 pin. 138 type: boolean 139 140 cts-override: 141 description: Override the CTS modem status signal. This signal will 142 always be reported as active instead of being obtained from the modem 143 status register. Define this if your serial port does not use this 144 pin. 145 type: boolean 146 147 ri-override: 148 description: Override the RI modem status signal. This signal will always 149 be reported as inactive instead of being obtained from the modem status 150 register. Define this if your serial port does not use this pin. 151 type: boolean 152 153required: 154 - compatible 155 - reg 156 157unevaluatedProperties: false 158 159examples: 160 - | 161 serial@80230000 { 162 compatible = "snps,dw-apb-uart"; 163 reg = <0x80230000 0x100>; 164 clock-frequency = <3686400>; 165 interrupts = <10>; 166 reg-shift = <2>; 167 reg-io-width = <4>; 168 dcd-override; 169 dsr-override; 170 cts-override; 171 ri-override; 172 }; 173 174 - | 175 // Example with one clock: 176 serial@80230000 { 177 compatible = "snps,dw-apb-uart"; 178 reg = <0x80230000 0x100>; 179 clocks = <&baudclk>; 180 interrupts = <10>; 181 reg-shift = <2>; 182 reg-io-width = <4>; 183 }; 184 185 - | 186 // Example with two clocks: 187 serial@80230000 { 188 compatible = "snps,dw-apb-uart"; 189 reg = <0x80230000 0x100>; 190 clocks = <&baudclk>, <&apb_pclk>; 191 clock-names = "baudclk", "apb_pclk"; 192 interrupts = <10>; 193 reg-shift = <2>; 194 reg-io-width = <4>; 195 }; 196... 197