1# SPDX-License-Identifier: GPL-2.0 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/serial/snps-dw-apb-uart.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Synopsys DesignWare ABP UART 8 9maintainers: 10 - Rob Herring <robh@kernel.org> 11 12allOf: 13 - $ref: serial.yaml# 14 - $ref: rs485.yaml# 15 16 - if: 17 properties: 18 compatible: 19 items: 20 - {} 21 - const: renesas,rzn1-uart 22 - const: snps,dw-apb-uart 23 then: 24 properties: 25 dmas: false 26 dma-names: false 27 28 - if: 29 properties: 30 compatible: 31 contains: 32 const: starfive,jh7110-uart 33 then: 34 properties: 35 resets: 36 minItems: 2 37 else: 38 properties: 39 resets: 40 maxItems: 1 41 42properties: 43 compatible: 44 oneOf: 45 - items: 46 - const: renesas,r9a06g032-uart 47 - const: renesas,rzn1-uart 48 - const: snps,dw-apb-uart 49 - items: 50 - const: renesas,r9a06g032-uart 51 - const: renesas,rzn1-uart 52 - items: 53 - enum: 54 - brcm,bcm11351-dw-apb-uart 55 - brcm,bcm21664-dw-apb-uart 56 - rockchip,px30-uart 57 - rockchip,rk1808-uart 58 - rockchip,rk3036-uart 59 - rockchip,rk3066-uart 60 - rockchip,rk3128-uart 61 - rockchip,rk3188-uart 62 - rockchip,rk3288-uart 63 - rockchip,rk3308-uart 64 - rockchip,rk3328-uart 65 - rockchip,rk3368-uart 66 - rockchip,rk3399-uart 67 - rockchip,rk3528-uart 68 - rockchip,rk3562-uart 69 - rockchip,rk3568-uart 70 - rockchip,rk3576-uart 71 - rockchip,rk3588-uart 72 - rockchip,rv1108-uart 73 - rockchip,rv1126-uart 74 - sophgo,sg2044-uart 75 - starfive,jh7100-hsuart 76 - starfive,jh7100-uart 77 - starfive,jh7110-uart 78 - const: snps,dw-apb-uart 79 - const: snps,dw-apb-uart 80 81 reg: 82 maxItems: 1 83 84 interrupts: 85 maxItems: 1 86 87 clock-frequency: true 88 89 clocks: 90 minItems: 1 91 maxItems: 2 92 93 clock-names: 94 items: 95 - const: baudclk 96 - const: apb_pclk 97 98 dmas: 99 maxItems: 2 100 101 dma-names: 102 items: 103 - const: tx 104 - const: rx 105 106 snps,uart-16550-compatible: 107 description: reflects the value of UART_16550_COMPATIBLE configuration 108 parameter. Define this if your UART does not implement the busy functionality. 109 type: boolean 110 111 power-domains: 112 maxItems: 1 113 114 resets: 115 minItems: 1 116 maxItems: 2 117 118 reg-shift: true 119 120 reg-io-width: true 121 122 dcd-override: 123 description: Override the DCD modem status signal. This signal will 124 always be reported as active instead of being obtained from the modem 125 status register. Define this if your serial port does not use this 126 pin. 127 type: boolean 128 129 dsr-override: 130 description: Override the DTS modem status signal. This signal will 131 always be reported as active instead of being obtained from the modem 132 status register. Define this if your serial port does not use this 133 pin. 134 type: boolean 135 136 cts-override: 137 description: Override the CTS modem status signal. This signal will 138 always be reported as active instead of being obtained from the modem 139 status register. Define this if your serial port does not use this 140 pin. 141 type: boolean 142 143 ri-override: 144 description: Override the RI modem status signal. This signal will always 145 be reported as inactive instead of being obtained from the modem status 146 register. Define this if your serial port does not use this pin. 147 type: boolean 148 149required: 150 - compatible 151 - reg 152 153unevaluatedProperties: false 154 155examples: 156 - | 157 serial@80230000 { 158 compatible = "snps,dw-apb-uart"; 159 reg = <0x80230000 0x100>; 160 clock-frequency = <3686400>; 161 interrupts = <10>; 162 reg-shift = <2>; 163 reg-io-width = <4>; 164 dcd-override; 165 dsr-override; 166 cts-override; 167 ri-override; 168 }; 169 170 - | 171 // Example with one clock: 172 serial@80230000 { 173 compatible = "snps,dw-apb-uart"; 174 reg = <0x80230000 0x100>; 175 clocks = <&baudclk>; 176 interrupts = <10>; 177 reg-shift = <2>; 178 reg-io-width = <4>; 179 }; 180 181 - | 182 // Example with two clocks: 183 serial@80230000 { 184 compatible = "snps,dw-apb-uart"; 185 reg = <0x80230000 0x100>; 186 clocks = <&baudclk>, <&apb_pclk>; 187 clock-names = "baudclk", "apb_pclk"; 188 interrupts = <10>; 189 reg-shift = <2>; 190 reg-io-width = <4>; 191 }; 192... 193