xref: /linux/Documentation/devicetree/bindings/serial/samsung_uart.yaml (revision fa79e55d467366a2c52c68a261a0d6ea5f8a6534) 
1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/serial/samsung_uart.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Samsung S3C, S5P, Exynos, and S5L (Apple SoC) SoC UART Controller
8
9maintainers:
10  - Krzysztof Kozlowski <krzk@kernel.org>
11  - Greg Kroah-Hartman <gregkh@linuxfoundation.org>
12
13description: |+
14  Each Samsung UART should have an alias correctly numbered in the "aliases"
15  node, according to serialN format, where N is the port number (non-negative
16  decimal integer) as specified by User's Manual of respective SoC.
17
18properties:
19  compatible:
20    oneOf:
21      - enum:
22          - apple,s5l-uart
23          - axis,artpec8-uart
24          - google,gs101-uart
25          - samsung,s3c6400-uart
26          - samsung,s5pv210-uart
27          - samsung,exynos4210-uart
28          - samsung,exynos5433-uart
29          - samsung,exynos850-uart
30          - samsung,exynos8895-uart
31      - items:
32          - enum:
33              - samsung,exynos7-uart
34              - tesla,fsd-uart
35          - const: samsung,exynos4210-uart
36      - items:
37          - enum:
38              - samsung,exynos7885-uart
39          - const: samsung,exynos5433-uart
40      - items:
41          - enum:
42              - samsung,exynosautov9-uart
43              - samsung,exynosautov920-uart
44          - const: samsung,exynos850-uart
45      - items:
46          - enum:
47              - samsung,exynos7870-uart
48          - const: samsung,exynos8895-uart
49
50  reg:
51    maxItems: 1
52
53  reg-io-width:
54    description: |
55      The size (in bytes) of the IO accesses that should be performed
56      on the device.
57    enum: [ 1, 4 ]
58
59  clocks:
60    minItems: 2
61    maxItems: 5
62
63  clock-names:
64    minItems: 2
65    maxItems: 5
66
67  dmas:
68    items:
69      - description: DMA controller phandle and request line for RX
70      - description: DMA controller phandle and request line for TX
71
72  dma-names:
73    items:
74      - const: rx
75      - const: tx
76
77  interrupts:
78    description: RX interrupt and optionally TX interrupt.
79    minItems: 1
80    maxItems: 2
81
82  power-domains:
83    maxItems: 1
84
85  samsung,uart-fifosize:
86    description: The fifo size supported by the UART channel.
87    $ref: /schemas/types.yaml#/definitions/uint32
88    enum: [16, 64, 256]
89
90required:
91  - compatible
92  - clocks
93  - clock-names
94  - interrupts
95  - reg
96
97allOf:
98  - $ref: serial.yaml#
99
100  - if:
101      properties:
102        compatible:
103          contains:
104            enum:
105              - samsung,s3c6400-uart
106    then:
107      properties:
108        clocks:
109          minItems: 3
110          maxItems: 3
111
112        clock-names:
113          items:
114            - const: uart
115            - const: clk_uart_baud2
116            - const: clk_uart_baud3
117
118    else:
119      properties:
120        clock-names:
121          minItems: 2
122          items:
123            - const: uart
124            - const: clk_uart_baud0
125            - const: clk_uart_baud1
126            - const: clk_uart_baud2
127            - const: clk_uart_baud3
128
129  - if:
130      properties:
131        compatible:
132          contains:
133            enum:
134              - samsung,s5pv210-uart
135    then:
136      properties:
137        clocks:
138          minItems: 3
139          maxItems: 3
140
141        clock-names:
142          minItems: 3
143          maxItems: 3
144
145  - if:
146      properties:
147        compatible:
148          contains:
149            enum:
150              - apple,s5l-uart
151              - axis,artpec8-uart
152              - samsung,exynos4210-uart
153              - samsung,exynos5433-uart
154    then:
155      properties:
156        clocks:
157          maxItems: 2
158
159        clock-names:
160          maxItems: 2
161
162  - if:
163      properties:
164        compatible:
165          contains:
166            enum:
167              - google,gs101-uart
168              - samsung,exynos8895-uart
169    then:
170      required:
171        - samsung,uart-fifosize
172      properties:
173        clocks:
174          maxItems: 2
175
176        clock-names:
177          maxItems: 2
178
179  - if:
180      properties:
181        compatible:
182          contains:
183            enum:
184              - google,gs101-uart
185    then:
186      properties:
187        reg-io-width: false
188
189unevaluatedProperties: false
190
191examples:
192  - |
193    #include <dt-bindings/clock/samsung,s3c64xx-clock.h>
194
195    uart0: serial@7f005000 {
196        compatible = "samsung,s3c6400-uart";
197        reg = <0x7f005000 0x100>;
198        interrupt-parent = <&vic1>;
199        interrupts = <5>;
200        clock-names = "uart", "clk_uart_baud2",
201                      "clk_uart_baud3";
202        clocks = <&clocks PCLK_UART0>, <&clocks PCLK_UART0>,
203                 <&clocks SCLK_UART>;
204        samsung,uart-fifosize = <16>;
205    };
206  - |
207    #include <dt-bindings/clock/google,gs101.h>
208    #include <dt-bindings/interrupt-controller/arm-gic.h>
209    #include <dt-bindings/interrupt-controller/irq.h>
210
211    serial_0: serial@10a00000 {
212      compatible = "google,gs101-uart";
213      reg = <0x10a00000 0xc0>;
214      clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_PCLK_0>,
215               <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_IPCLK_0>;
216      clock-names = "uart", "clk_uart_baud0";
217      interrupts = <GIC_SPI 634 IRQ_TYPE_LEVEL_HIGH 0>;
218      pinctrl-0 = <&uart0_bus>;
219      pinctrl-names = "default";
220      samsung,uart-fifosize = <256>;
221    };
222