1# SPDX-License-Identifier: GPL-2.0 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/serial/samsung_uart.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Samsung S3C, S5P, Exynos, and S5L (Apple SoC) SoC UART Controller 8 9maintainers: 10 - Krzysztof Kozlowski <krzk@kernel.org> 11 - Greg Kroah-Hartman <gregkh@linuxfoundation.org> 12 13description: |+ 14 Each Samsung UART should have an alias correctly numbered in the "aliases" 15 node, according to serialN format, where N is the port number (non-negative 16 decimal integer) as specified by User's Manual of respective SoC. 17 18properties: 19 compatible: 20 oneOf: 21 - enum: 22 - apple,s5l-uart 23 - axis,artpec8-uart 24 - google,gs101-uart 25 - samsung,s3c6400-uart 26 - samsung,s5pv210-uart 27 - samsung,exynos4210-uart 28 - samsung,exynos5433-uart 29 - samsung,exynos850-uart 30 - items: 31 - enum: 32 - samsung,exynos7-uart 33 - tesla,fsd-uart 34 - const: samsung,exynos4210-uart 35 - items: 36 - enum: 37 - samsung,exynos7885-uart 38 - const: samsung,exynos5433-uart 39 - items: 40 - enum: 41 - samsung,exynosautov9-uart 42 - samsung,exynosautov920-uart 43 - const: samsung,exynos850-uart 44 45 reg: 46 maxItems: 1 47 48 reg-io-width: 49 description: | 50 The size (in bytes) of the IO accesses that should be performed 51 on the device. 52 enum: [ 1, 4 ] 53 54 clocks: 55 minItems: 2 56 maxItems: 5 57 58 clock-names: 59 minItems: 2 60 maxItems: 5 61 62 dmas: 63 items: 64 - description: DMA controller phandle and request line for RX 65 - description: DMA controller phandle and request line for TX 66 67 dma-names: 68 items: 69 - const: rx 70 - const: tx 71 72 interrupts: 73 description: RX interrupt and optionally TX interrupt. 74 minItems: 1 75 maxItems: 2 76 77 power-domains: 78 maxItems: 1 79 80 samsung,uart-fifosize: 81 description: The fifo size supported by the UART channel. 82 $ref: /schemas/types.yaml#/definitions/uint32 83 enum: [16, 64, 256] 84 85required: 86 - compatible 87 - clocks 88 - clock-names 89 - interrupts 90 - reg 91 92allOf: 93 - $ref: serial.yaml# 94 95 - if: 96 properties: 97 compatible: 98 contains: 99 enum: 100 - samsung,s3c6400-uart 101 then: 102 properties: 103 clocks: 104 minItems: 3 105 maxItems: 3 106 107 clock-names: 108 items: 109 - const: uart 110 - const: clk_uart_baud2 111 - const: clk_uart_baud3 112 113 else: 114 properties: 115 clock-names: 116 minItems: 2 117 items: 118 - const: uart 119 - const: clk_uart_baud0 120 - const: clk_uart_baud1 121 - const: clk_uart_baud2 122 - const: clk_uart_baud3 123 124 - if: 125 properties: 126 compatible: 127 contains: 128 enum: 129 - samsung,s5pv210-uart 130 then: 131 properties: 132 clocks: 133 minItems: 3 134 maxItems: 3 135 136 clock-names: 137 minItems: 3 138 maxItems: 3 139 140 - if: 141 properties: 142 compatible: 143 contains: 144 enum: 145 - apple,s5l-uart 146 - axis,artpec8-uart 147 - samsung,exynos4210-uart 148 - samsung,exynos5433-uart 149 then: 150 properties: 151 clocks: 152 maxItems: 2 153 154 clock-names: 155 maxItems: 2 156 157 - if: 158 properties: 159 compatible: 160 contains: 161 enum: 162 - google,gs101-uart 163 then: 164 required: 165 - samsung,uart-fifosize 166 properties: 167 reg-io-width: false 168 169 clocks: 170 maxItems: 2 171 172 clock-names: 173 maxItems: 2 174 175unevaluatedProperties: false 176 177examples: 178 - | 179 #include <dt-bindings/clock/samsung,s3c64xx-clock.h> 180 181 uart0: serial@7f005000 { 182 compatible = "samsung,s3c6400-uart"; 183 reg = <0x7f005000 0x100>; 184 interrupt-parent = <&vic1>; 185 interrupts = <5>; 186 clock-names = "uart", "clk_uart_baud2", 187 "clk_uart_baud3"; 188 clocks = <&clocks PCLK_UART0>, <&clocks PCLK_UART0>, 189 <&clocks SCLK_UART>; 190 samsung,uart-fifosize = <16>; 191 }; 192 - | 193 #include <dt-bindings/clock/google,gs101.h> 194 #include <dt-bindings/interrupt-controller/arm-gic.h> 195 #include <dt-bindings/interrupt-controller/irq.h> 196 197 serial_0: serial@10a00000 { 198 compatible = "google,gs101-uart"; 199 reg = <0x10a00000 0xc0>; 200 clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_PCLK_0>, 201 <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_IPCLK_0>; 202 clock-names = "uart", "clk_uart_baud0"; 203 interrupts = <GIC_SPI 634 IRQ_TYPE_LEVEL_HIGH 0>; 204 pinctrl-0 = <&uart0_bus>; 205 pinctrl-names = "default"; 206 samsung,uart-fifosize = <256>; 207 }; 208