xref: /linux/Documentation/devicetree/bindings/serial/samsung_uart.yaml (revision c5dbf04160005e07e8ca7232a7faa77ab1547ae0) 
1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/serial/samsung_uart.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Samsung S3C, S5P, Exynos, and S5L (Apple SoC) SoC UART Controller
8
9maintainers:
10  - Krzysztof Kozlowski <krzk@kernel.org>
11  - Greg Kroah-Hartman <gregkh@linuxfoundation.org>
12
13description: |+
14  Each Samsung UART should have an alias correctly numbered in the "aliases"
15  node, according to serialN format, where N is the port number (non-negative
16  decimal integer) as specified by User's Manual of respective SoC.
17
18properties:
19  compatible:
20    oneOf:
21      - items:
22          - const: samsung,exynosautov9-uart
23          - const: samsung,exynos850-uart
24      - enum:
25          - apple,s5l-uart
26          - axis,artpec8-uart
27          - samsung,s3c6400-uart
28          - samsung,s5pv210-uart
29          - samsung,exynos4210-uart
30          - samsung,exynos5433-uart
31          - samsung,exynos850-uart
32
33  reg:
34    maxItems: 1
35
36  reg-io-width:
37    description: |
38      The size (in bytes) of the IO accesses that should be performed
39      on the device.
40    enum: [ 1, 4 ]
41
42  clocks:
43    minItems: 2
44    maxItems: 5
45
46  clock-names:
47    description: N = 0 is allowed for SoCs without internal baud clock mux.
48    minItems: 2
49    items:
50      - const: uart
51      - pattern: '^clk_uart_baud[0-3]$'
52      - pattern: '^clk_uart_baud[0-3]$'
53      - pattern: '^clk_uart_baud[0-3]$'
54      - pattern: '^clk_uart_baud[0-3]$'
55
56  dmas:
57    items:
58      - description: DMA controller phandle and request line for RX
59      - description: DMA controller phandle and request line for TX
60
61  dma-names:
62    items:
63      - const: rx
64      - const: tx
65
66  interrupts:
67    description: RX interrupt and optionally TX interrupt.
68    minItems: 1
69    maxItems: 2
70
71  power-domains:
72    maxItems: 1
73
74  samsung,uart-fifosize:
75    description: The fifo size supported by the UART channel.
76    $ref: /schemas/types.yaml#/definitions/uint32
77    enum: [16, 64, 256]
78
79required:
80  - compatible
81  - clocks
82  - clock-names
83  - interrupts
84  - reg
85
86allOf:
87  - $ref: serial.yaml#
88
89  - if:
90      properties:
91        compatible:
92          contains:
93            enum:
94              - samsung,s5pv210-uart
95    then:
96      properties:
97        clocks:
98          minItems: 2
99          maxItems: 3
100        clock-names:
101          minItems: 2
102          items:
103            - const: uart
104            - pattern: '^clk_uart_baud[0-1]$'
105            - pattern: '^clk_uart_baud[0-1]$'
106
107  - if:
108      properties:
109        compatible:
110          contains:
111            enum:
112              - apple,s5l-uart
113              - axis,artpec8-uart
114              - samsung,exynos4210-uart
115              - samsung,exynos5433-uart
116    then:
117      properties:
118        clocks:
119          maxItems: 2
120        clock-names:
121          items:
122            - const: uart
123            - const: clk_uart_baud0
124
125unevaluatedProperties: false
126
127examples:
128  - |
129    #include <dt-bindings/clock/samsung,s3c64xx-clock.h>
130
131    uart0: serial@7f005000 {
132        compatible = "samsung,s3c6400-uart";
133        reg = <0x7f005000 0x100>;
134        interrupt-parent = <&vic1>;
135        interrupts = <5>;
136        clock-names = "uart", "clk_uart_baud2",
137                      "clk_uart_baud3";
138        clocks = <&clocks PCLK_UART0>, <&clocks PCLK_UART0>,
139                 <&clocks SCLK_UART>;
140        samsung,uart-fifosize = <16>;
141    };
142