1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/serial/renesas,scif.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Renesas Serial Communication Interface with FIFO (SCIF) 8 9maintainers: 10 - Geert Uytterhoeven <geert+renesas@glider.be> 11 12properties: 13 compatible: 14 oneOf: 15 - items: 16 - enum: 17 - renesas,scif-r7s72100 # RZ/A1H 18 - const: renesas,scif # generic SCIF compatible UART 19 20 - items: 21 - enum: 22 - renesas,scif-r7s9210 # RZ/A2 23 24 - items: 25 - enum: 26 - renesas,scif-r8a7778 # R-Car M1 27 - renesas,scif-r8a7779 # R-Car H1 28 - const: renesas,rcar-gen1-scif # R-Car Gen1 29 - const: renesas,scif # generic SCIF compatible UART 30 31 - items: 32 - enum: 33 - renesas,scif-r8a7742 # RZ/G1H 34 - renesas,scif-r8a7743 # RZ/G1M 35 - renesas,scif-r8a7744 # RZ/G1N 36 - renesas,scif-r8a7745 # RZ/G1E 37 - renesas,scif-r8a77470 # RZ/G1C 38 - renesas,scif-r8a7790 # R-Car H2 39 - renesas,scif-r8a7791 # R-Car M2-W 40 - renesas,scif-r8a7792 # R-Car V2H 41 - renesas,scif-r8a7793 # R-Car M2-N 42 - renesas,scif-r8a7794 # R-Car E2 43 - const: renesas,rcar-gen2-scif # R-Car Gen2 and RZ/G1 44 - const: renesas,scif # generic SCIF compatible UART 45 46 - items: 47 - enum: 48 - renesas,scif-r8a774a1 # RZ/G2M 49 - renesas,scif-r8a774a3 # RZ/G2M v3.0 50 - renesas,scif-r8a774b1 # RZ/G2N 51 - renesas,scif-r8a774c0 # RZ/G2E 52 - renesas,scif-r8a774e1 # RZ/G2H 53 - renesas,scif-r8a7795 # R-Car H3 54 - renesas,scif-r8a7796 # R-Car M3-W 55 - renesas,scif-r8a77961 # R-Car M3-W+ 56 - renesas,scif-r8a77965 # R-Car M3-N 57 - renesas,scif-r8a77970 # R-Car V3M 58 - renesas,scif-r8a77980 # R-Car V3H 59 - renesas,scif-r8a77990 # R-Car E3 60 - renesas,scif-r8a77995 # R-Car D3 61 - const: renesas,rcar-gen3-scif # R-Car Gen3 and RZ/G2 62 - const: renesas,scif # generic SCIF compatible UART 63 64 - items: 65 - enum: 66 - renesas,scif-r8a779a0 # R-Car V3U 67 - renesas,scif-r8a779f0 # R-Car S4-8 68 - renesas,scif-r8a779g0 # R-Car V4H 69 - renesas,scif-r8a779h0 # R-Car V4M 70 - const: renesas,rcar-gen4-scif # R-Car Gen4 71 - const: renesas,scif # generic SCIF compatible UART 72 73 - items: 74 - enum: 75 - renesas,scif-r8a78000 # R-Car X5H 76 - const: renesas,rcar-gen5-scif # R-Car Gen5 77 - const: renesas,scif # generic SCIF compatible UART 78 79 - items: 80 - enum: 81 - renesas,scif-r9a07g044 # RZ/G2{L,LC} 82 83 - items: 84 - enum: 85 - renesas,scif-r9a07g043 # RZ/G2UL and RZ/Five 86 - renesas,scif-r9a07g054 # RZ/V2L 87 - renesas,scif-r9a08g045 # RZ/G3S 88 - const: renesas,scif-r9a07g044 # RZ/G2{L,LC} fallback 89 90 - const: renesas,scif-r9a09g057 # RZ/V2H(P) 91 92 - items: 93 - enum: 94 - renesas,scif-r9a09g047 # RZ/G3E 95 - renesas,scif-r9a09g056 # RZ/V2N 96 - const: renesas,scif-r9a09g057 # RZ/V2H fallback 97 98 reg: 99 maxItems: 1 100 101 interrupts: 102 oneOf: 103 - items: 104 - description: A combined interrupt 105 - items: 106 - description: Error interrupt 107 - description: Receive buffer full interrupt 108 - description: Transmit buffer empty interrupt 109 - description: Break interrupt 110 - description: Data Ready interrupt 111 - description: Transmit End interrupt 112 - description: Transmit End/Data Ready interrupt 113 - description: Receive buffer full interrupt (EDGE trigger) 114 - description: Transmit buffer empty interrupt (EDGE trigger) 115 minItems: 4 116 117 interrupt-names: 118 minItems: 4 119 items: 120 - const: eri 121 - const: rxi 122 - const: txi 123 - const: bri 124 - const: dri 125 - const: tei 126 - const: tei-dri 127 - const: rxi-edge 128 - const: txi-edge 129 130 clocks: 131 minItems: 1 132 maxItems: 4 133 134 clock-names: 135 minItems: 1 136 maxItems: 4 137 items: 138 enum: 139 - fck # UART functional clock 140 - sck # optional external clock input 141 - brg_int # optional internal clock source for BRG frequency divider 142 - scif_clk # optional external clock source for BRG frequency divider 143 144 power-domains: 145 maxItems: 1 146 147 resets: 148 maxItems: 1 149 150 dmas: 151 minItems: 2 152 maxItems: 4 153 description: 154 Must contain a list of pairs of references to DMA specifiers, one for 155 transmission, and one for reception. 156 157 dma-names: 158 minItems: 2 159 maxItems: 4 160 items: 161 enum: 162 - tx 163 - rx 164 165required: 166 - compatible 167 - reg 168 - interrupts 169 - clocks 170 - clock-names 171 - power-domains 172 173allOf: 174 - $ref: serial.yaml# 175 176 - if: 177 properties: 178 compatible: 179 contains: 180 enum: 181 - renesas,rcar-gen2-scif 182 - renesas,rcar-gen3-scif 183 - renesas,rcar-gen4-scif 184 - renesas,rcar-gen5-scif 185 - renesas,scif-r9a07g044 186 - renesas,scif-r9a09g057 187 then: 188 required: 189 - resets 190 191 - if: 192 properties: 193 compatible: 194 contains: 195 enum: 196 - renesas,rcar-gen1-scif 197 - renesas,rcar-gen2-scif 198 - renesas,rcar-gen3-scif 199 - renesas,rcar-gen4-scif 200 then: 201 properties: 202 interrupts: 203 maxItems: 1 204 205 interrupt-names: false 206 else: 207 required: 208 - interrupt-names 209 210 - if: 211 properties: 212 compatible: 213 contains: 214 enum: 215 - renesas,scif-r7s72100 216 then: 217 properties: 218 interrupts: 219 minItems: 4 220 maxItems: 4 221 222 interrupt-names: 223 maxItems: 4 224 225 - if: 226 properties: 227 compatible: 228 contains: 229 enum: 230 - renesas,scif-r7s9210 231 - renesas,scif-r9a07g044 232 then: 233 properties: 234 interrupts: 235 minItems: 6 236 maxItems: 6 237 238 interrupt-names: 239 minItems: 6 240 maxItems: 6 241 242 - if: 243 properties: 244 compatible: 245 contains: 246 const: renesas,scif-r9a09g057 247 then: 248 properties: 249 clocks: 250 maxItems: 1 251 252 clock-names: 253 maxItems: 1 254 255 interrupts: 256 minItems: 9 257 258 interrupt-names: 259 minItems: 9 260 261unevaluatedProperties: false 262 263examples: 264 - | 265 #include <dt-bindings/clock/r8a7791-cpg-mssr.h> 266 #include <dt-bindings/interrupt-controller/arm-gic.h> 267 #include <dt-bindings/power/r8a7791-sysc.h> 268 aliases { 269 serial0 = &scif0; 270 }; 271 272 scif0: serial@e6e60000 { 273 compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif", 274 "renesas,scif"; 275 reg = <0xe6e60000 64>; 276 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 277 clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7791_CLK_ZS>, 278 <&scif_clk>; 279 clock-names = "fck", "brg_int", "scif_clk"; 280 dmas = <&dmac0 0x29>, <&dmac0 0x2a>, <&dmac1 0x29>, <&dmac1 0x2a>; 281 dma-names = "tx", "rx", "tx", "rx"; 282 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 283 resets = <&cpg 721>; 284 }; 285