xref: /linux/Documentation/devicetree/bindings/serial/renesas,scif.yaml (revision 266aa3b4812e97942a8ce5c7aafa7da059f7b5b8) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/serial/renesas,scif.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Renesas Serial Communication Interface with FIFO (SCIF)
8
9maintainers:
10  - Geert Uytterhoeven <geert+renesas@glider.be>
11
12allOf:
13  - $ref: serial.yaml#
14
15properties:
16  compatible:
17    oneOf:
18      - items:
19          - enum:
20              - renesas,scif-r7s72100     # RZ/A1H
21          - const: renesas,scif           # generic SCIF compatible UART
22
23      - items:
24          - enum:
25              - renesas,scif-r7s9210      # RZ/A2
26
27      - items:
28          - enum:
29              - renesas,scif-r8a7778      # R-Car M1
30              - renesas,scif-r8a7779      # R-Car H1
31          - const: renesas,rcar-gen1-scif # R-Car Gen1
32          - const: renesas,scif           # generic SCIF compatible UART
33
34      - items:
35          - enum:
36              - renesas,scif-r8a7742      # RZ/G1H
37              - renesas,scif-r8a7743      # RZ/G1M
38              - renesas,scif-r8a7744      # RZ/G1N
39              - renesas,scif-r8a7745      # RZ/G1E
40              - renesas,scif-r8a77470     # RZ/G1C
41              - renesas,scif-r8a7790      # R-Car H2
42              - renesas,scif-r8a7791      # R-Car M2-W
43              - renesas,scif-r8a7792      # R-Car V2H
44              - renesas,scif-r8a7793      # R-Car M2-N
45              - renesas,scif-r8a7794      # R-Car E2
46          - const: renesas,rcar-gen2-scif # R-Car Gen2 and RZ/G1
47          - const: renesas,scif           # generic SCIF compatible UART
48
49      - items:
50          - enum:
51              - renesas,scif-r8a774a1     # RZ/G2M
52              - renesas,scif-r8a774b1     # RZ/G2N
53              - renesas,scif-r8a774c0     # RZ/G2E
54              - renesas,scif-r8a774e1     # RZ/G2H
55              - renesas,scif-r8a7795      # R-Car H3
56              - renesas,scif-r8a7796      # R-Car M3-W
57              - renesas,scif-r8a77961     # R-Car M3-W+
58              - renesas,scif-r8a77965     # R-Car M3-N
59              - renesas,scif-r8a77970     # R-Car V3M
60              - renesas,scif-r8a77980     # R-Car V3H
61              - renesas,scif-r8a77990     # R-Car E3
62              - renesas,scif-r8a77995     # R-Car D3
63          - const: renesas,rcar-gen3-scif # R-Car Gen3 and RZ/G2
64          - const: renesas,scif           # generic SCIF compatible UART
65
66      - items:
67          - enum:
68              - renesas,scif-r8a779a0     # R-Car V3U
69              - renesas,scif-r8a779f0     # R-Car S4-8
70              - renesas,scif-r8a779g0     # R-Car V4H
71              - renesas,scif-r8a779h0     # R-Car V4M
72          - const: renesas,rcar-gen4-scif # R-Car Gen4
73          - const: renesas,scif           # generic SCIF compatible UART
74
75      - items:
76          - enum:
77              - renesas,scif-r9a07g044      # RZ/G2{L,LC}
78
79      - items:
80          - enum:
81              - renesas,scif-r9a07g043      # RZ/G2UL and RZ/Five
82              - renesas,scif-r9a07g054      # RZ/V2L
83              - renesas,scif-r9a08g045      # RZ/G3S
84          - const: renesas,scif-r9a07g044   # RZ/G2{L,LC} fallback
85
86  reg:
87    maxItems: 1
88
89  interrupts:
90    oneOf:
91      - items:
92          - description: A combined interrupt
93      - items:
94          - description: Error interrupt
95          - description: Receive buffer full interrupt
96          - description: Transmit buffer empty interrupt
97          - description: Break interrupt
98      - items:
99          - description: Error interrupt
100          - description: Receive buffer full interrupt
101          - description: Transmit buffer empty interrupt
102          - description: Break interrupt
103          - description: Data Ready interrupt
104          - description: Transmit End interrupt
105
106  interrupt-names:
107    oneOf:
108      - items:
109          - const: eri
110          - const: rxi
111          - const: txi
112          - const: bri
113      - items:
114          - const: eri
115          - const: rxi
116          - const: txi
117          - const: bri
118          - const: dri
119          - const: tei
120
121  clocks:
122    minItems: 1
123    maxItems: 4
124
125  clock-names:
126    minItems: 1
127    maxItems: 4
128    items:
129      enum:
130        - fck # UART functional clock
131        - sck # optional external clock input
132        - brg_int # optional internal clock source for BRG frequency divider
133        - scif_clk # optional external clock source for BRG frequency divider
134
135  power-domains:
136    maxItems: 1
137
138  resets:
139    maxItems: 1
140
141  dmas:
142    minItems: 2
143    maxItems: 4
144    description:
145      Must contain a list of pairs of references to DMA specifiers, one for
146      transmission, and one for reception.
147
148  dma-names:
149    minItems: 2
150    maxItems: 4
151    items:
152      enum:
153        - tx
154        - rx
155
156required:
157  - compatible
158  - reg
159  - interrupts
160  - clocks
161  - clock-names
162  - power-domains
163
164if:
165  properties:
166    compatible:
167      contains:
168        enum:
169          - renesas,rcar-gen2-scif
170          - renesas,rcar-gen3-scif
171          - renesas,rcar-gen4-scif
172          - renesas,scif-r9a07g044
173then:
174  required:
175    - resets
176
177unevaluatedProperties: false
178
179examples:
180  - |
181    #include <dt-bindings/clock/r8a7791-cpg-mssr.h>
182    #include <dt-bindings/interrupt-controller/arm-gic.h>
183    #include <dt-bindings/power/r8a7791-sysc.h>
184    aliases {
185        serial0 = &scif0;
186    };
187
188    scif0: serial@e6e60000 {
189        compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif",
190                     "renesas,scif";
191        reg = <0xe6e60000 64>;
192        interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
193        clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
194                 <&scif_clk>;
195        clock-names = "fck", "brg_int", "scif_clk";
196        dmas = <&dmac0 0x29>, <&dmac0 0x2a>, <&dmac1 0x29>, <&dmac1 0x2a>;
197        dma-names = "tx", "rx", "tx", "rx";
198        power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
199        resets = <&cpg 721>;
200    };
201