xref: /linux/Documentation/devicetree/bindings/serial/renesas,hscif.yaml (revision 26fbb4c8c7c3ee9a4c3b4de555a8587b5a19154e) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: "http://devicetree.org/schemas/serial/renesas,hscif.yaml#"
5$schema: "http://devicetree.org/meta-schemas/core.yaml#"
6
7title: Renesas High Speed Serial Communication Interface with FIFO (HSCIF)
8
9maintainers:
10  - Geert Uytterhoeven <geert+renesas@glider.be>
11
12allOf:
13  - $ref: serial.yaml#
14
15properties:
16  compatible:
17    oneOf:
18      - items:
19          - enum:
20              - renesas,hscif-r8a7778      # R-Car M1
21              - renesas,hscif-r8a7779      # R-Car H1
22          - const: renesas,rcar-gen1-hscif # R-Car Gen1
23          - const: renesas,hscif           # generic HSCIF compatible UART
24
25      - items:
26          - enum:
27              - renesas,hscif-r8a7742      # RZ/G1H
28              - renesas,hscif-r8a7743      # RZ/G1M
29              - renesas,hscif-r8a7744      # RZ/G1N
30              - renesas,hscif-r8a7745      # RZ/G1E
31              - renesas,hscif-r8a77470     # RZ/G1C
32              - renesas,hscif-r8a7790      # R-Car H2
33              - renesas,hscif-r8a7791      # R-Car M2-W
34              - renesas,hscif-r8a7792      # R-Car V2H
35              - renesas,hscif-r8a7793      # R-Car M2-N
36              - renesas,hscif-r8a7794      # R-Car E2
37          - const: renesas,rcar-gen2-hscif # R-Car Gen2 and RZ/G1
38          - const: renesas,hscif           # generic HSCIF compatible UART
39
40      - items:
41          - enum:
42              - renesas,hscif-r8a774a1     # RZ/G2M
43              - renesas,hscif-r8a774b1     # RZ/G2N
44              - renesas,hscif-r8a774c0     # RZ/G2E
45              - renesas,hscif-r8a774e1     # RZ/G2H
46              - renesas,hscif-r8a7795      # R-Car H3
47              - renesas,hscif-r8a7796      # R-Car M3-W
48              - renesas,hscif-r8a77961     # R-Car M3-W+
49              - renesas,hscif-r8a77965     # R-Car M3-N
50              - renesas,hscif-r8a77970     # R-Car V3M
51              - renesas,hscif-r8a77980     # R-Car V3H
52              - renesas,hscif-r8a77990     # R-Car E3
53              - renesas,hscif-r8a77995     # R-Car D3
54          - const: renesas,rcar-gen3-hscif # R-Car Gen3 and RZ/G2
55          - const: renesas,hscif           # generic HSCIF compatible UART
56
57  reg:
58    maxItems: 1
59
60  interrupts:
61    maxItems: 1
62
63  clocks:
64    minItems: 1
65    maxItems: 4
66
67  clock-names:
68    minItems: 1
69    maxItems: 4
70    items:
71      enum:
72        - fck # UART functional clock
73        - hsck # optional external clock input
74        - brg_int # optional internal clock source for BRG frequency divider
75        - scif_clk # optional external clock source for BRG frequency divider
76
77  power-domains:
78    maxItems: 1
79
80  resets:
81    maxItems: 1
82
83  dmas:
84    description:
85      Must contain a list of pairs of references to DMA specifiers, one for
86      transmission, and one for reception.
87
88  dma-names:
89    minItems: 2
90    maxItems: 4
91    items:
92      enum:
93        - tx
94        - rx
95
96required:
97  - compatible
98  - reg
99  - interrupts
100  - clocks
101  - clock-names
102  - power-domains
103
104unevaluatedProperties: false
105
106if:
107  properties:
108    compatible:
109      contains:
110        enum:
111          - renesas,rcar-gen2-hscif
112          - renesas,rcar-gen3-hscif
113then:
114  required:
115    - resets
116
117examples:
118  - |
119    #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
120    #include <dt-bindings/interrupt-controller/arm-gic.h>
121    #include <dt-bindings/power/r8a7795-sysc.h>
122    aliases {
123            serial1 = &hscif1;
124    };
125
126    hscif1: serial@e6550000 {
127            compatible = "renesas,hscif-r8a7795", "renesas,rcar-gen3-hscif",
128                         "renesas,hscif";
129            reg = <0xe6550000 96>;
130            interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
131            clocks = <&cpg CPG_MOD 519>, <&cpg CPG_CORE R8A7795_CLK_S3D1>,
132                     <&scif_clk>;
133            clock-names = "fck", "brg_int", "scif_clk";
134            dmas = <&dmac1 0x33>, <&dmac1 0x32>, <&dmac2 0x33>, <&dmac2 0x32>;
135            dma-names = "tx", "rx", "tx", "rx";
136            power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
137            resets = <&cpg 519>;
138            uart-has-rtscts;
139    };
140