xref: /linux/Documentation/devicetree/bindings/serial/renesas,scif.yaml (revision 36ec807b627b4c0a0a382f0ae48eac7187d14b2b)
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/serial/renesas,scif.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Renesas Serial Communication Interface with FIFO (SCIF)
8
9maintainers:
10  - Geert Uytterhoeven <geert+renesas@glider.be>
11
12properties:
13  compatible:
14    oneOf:
15      - items:
16          - enum:
17              - renesas,scif-r7s72100     # RZ/A1H
18          - const: renesas,scif           # generic SCIF compatible UART
19
20      - items:
21          - enum:
22              - renesas,scif-r7s9210      # RZ/A2
23
24      - items:
25          - enum:
26              - renesas,scif-r8a7778      # R-Car M1
27              - renesas,scif-r8a7779      # R-Car H1
28          - const: renesas,rcar-gen1-scif # R-Car Gen1
29          - const: renesas,scif           # generic SCIF compatible UART
30
31      - items:
32          - enum:
33              - renesas,scif-r8a7742      # RZ/G1H
34              - renesas,scif-r8a7743      # RZ/G1M
35              - renesas,scif-r8a7744      # RZ/G1N
36              - renesas,scif-r8a7745      # RZ/G1E
37              - renesas,scif-r8a77470     # RZ/G1C
38              - renesas,scif-r8a7790      # R-Car H2
39              - renesas,scif-r8a7791      # R-Car M2-W
40              - renesas,scif-r8a7792      # R-Car V2H
41              - renesas,scif-r8a7793      # R-Car M2-N
42              - renesas,scif-r8a7794      # R-Car E2
43          - const: renesas,rcar-gen2-scif # R-Car Gen2 and RZ/G1
44          - const: renesas,scif           # generic SCIF compatible UART
45
46      - items:
47          - enum:
48              - renesas,scif-r8a774a1     # RZ/G2M
49              - renesas,scif-r8a774b1     # RZ/G2N
50              - renesas,scif-r8a774c0     # RZ/G2E
51              - renesas,scif-r8a774e1     # RZ/G2H
52              - renesas,scif-r8a7795      # R-Car H3
53              - renesas,scif-r8a7796      # R-Car M3-W
54              - renesas,scif-r8a77961     # R-Car M3-W+
55              - renesas,scif-r8a77965     # R-Car M3-N
56              - renesas,scif-r8a77970     # R-Car V3M
57              - renesas,scif-r8a77980     # R-Car V3H
58              - renesas,scif-r8a77990     # R-Car E3
59              - renesas,scif-r8a77995     # R-Car D3
60          - const: renesas,rcar-gen3-scif # R-Car Gen3 and RZ/G2
61          - const: renesas,scif           # generic SCIF compatible UART
62
63      - items:
64          - enum:
65              - renesas,scif-r8a779a0     # R-Car V3U
66              - renesas,scif-r8a779f0     # R-Car S4-8
67              - renesas,scif-r8a779g0     # R-Car V4H
68              - renesas,scif-r8a779h0     # R-Car V4M
69          - const: renesas,rcar-gen4-scif # R-Car Gen4
70          - const: renesas,scif           # generic SCIF compatible UART
71
72      - items:
73          - enum:
74              - renesas,scif-r9a07g044      # RZ/G2{L,LC}
75
76      - items:
77          - enum:
78              - renesas,scif-r9a07g043      # RZ/G2UL and RZ/Five
79              - renesas,scif-r9a07g054      # RZ/V2L
80              - renesas,scif-r9a08g045      # RZ/G3S
81          - const: renesas,scif-r9a07g044   # RZ/G2{L,LC} fallback
82
83      - const: renesas,scif-r9a09g057       # RZ/V2H(P)
84
85  reg:
86    maxItems: 1
87
88  interrupts:
89    oneOf:
90      - items:
91          - description: A combined interrupt
92      - items:
93          - description: Error interrupt
94          - description: Receive buffer full interrupt
95          - description: Transmit buffer empty interrupt
96          - description: Break interrupt
97          - description: Data Ready interrupt
98          - description: Transmit End interrupt
99          - description: Transmit End/Data Ready interrupt
100          - description: Receive buffer full interrupt (EDGE trigger)
101          - description: Transmit buffer empty interrupt (EDGE trigger)
102        minItems: 4
103
104  interrupt-names:
105    minItems: 4
106    items:
107      - const: eri
108      - const: rxi
109      - const: txi
110      - const: bri
111      - const: dri
112      - const: tei
113      - const: tei-dri
114      - const: rxi-edge
115      - const: txi-edge
116
117  clocks:
118    minItems: 1
119    maxItems: 4
120
121  clock-names:
122    minItems: 1
123    maxItems: 4
124    items:
125      enum:
126        - fck # UART functional clock
127        - sck # optional external clock input
128        - brg_int # optional internal clock source for BRG frequency divider
129        - scif_clk # optional external clock source for BRG frequency divider
130
131  power-domains:
132    maxItems: 1
133
134  resets:
135    maxItems: 1
136
137  dmas:
138    minItems: 2
139    maxItems: 4
140    description:
141      Must contain a list of pairs of references to DMA specifiers, one for
142      transmission, and one for reception.
143
144  dma-names:
145    minItems: 2
146    maxItems: 4
147    items:
148      enum:
149        - tx
150        - rx
151
152required:
153  - compatible
154  - reg
155  - interrupts
156  - clocks
157  - clock-names
158  - power-domains
159
160allOf:
161  - $ref: serial.yaml#
162
163  - if:
164      properties:
165        compatible:
166          contains:
167            enum:
168              - renesas,rcar-gen2-scif
169              - renesas,rcar-gen3-scif
170              - renesas,rcar-gen4-scif
171              - renesas,scif-r9a07g044
172              - renesas,scif-r9a09g057
173    then:
174      required:
175        - resets
176
177  - if:
178      properties:
179        compatible:
180          contains:
181            enum:
182              - renesas,rcar-gen1-scif
183              - renesas,rcar-gen2-scif
184              - renesas,rcar-gen3-scif
185              - renesas,rcar-gen4-scif
186    then:
187      properties:
188        interrupts:
189          maxItems: 1
190
191        interrupt-names: false
192    else:
193      required:
194        - interrupt-names
195
196  - if:
197      properties:
198        compatible:
199          contains:
200            enum:
201              - renesas,scif-r7s72100
202    then:
203      properties:
204        interrupts:
205          minItems: 4
206          maxItems: 4
207
208        interrupt-names:
209          maxItems: 4
210
211  - if:
212      properties:
213        compatible:
214          contains:
215            enum:
216              - renesas,scif-r7s9210
217              - renesas,scif-r9a07g044
218    then:
219      properties:
220        interrupts:
221          minItems: 6
222          maxItems: 6
223
224        interrupt-names:
225          minItems: 6
226          maxItems: 6
227
228  - if:
229      properties:
230        compatible:
231          contains:
232            const: renesas,scif-r9a09g057
233    then:
234      properties:
235        clocks:
236          maxItems: 1
237
238        clock-names:
239          maxItems: 1
240
241        interrupts:
242          minItems: 9
243
244        interrupt-names:
245          minItems: 9
246
247unevaluatedProperties: false
248
249examples:
250  - |
251    #include <dt-bindings/clock/r8a7791-cpg-mssr.h>
252    #include <dt-bindings/interrupt-controller/arm-gic.h>
253    #include <dt-bindings/power/r8a7791-sysc.h>
254    aliases {
255        serial0 = &scif0;
256    };
257
258    scif0: serial@e6e60000 {
259        compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif",
260                     "renesas,scif";
261        reg = <0xe6e60000 64>;
262        interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
263        clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
264                 <&scif_clk>;
265        clock-names = "fck", "brg_int", "scif_clk";
266        dmas = <&dmac0 0x29>, <&dmac0 0x2a>, <&dmac1 0x29>, <&dmac1 0x2a>;
267        dma-names = "tx", "rx", "tx", "rx";
268        power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
269        resets = <&cpg 721>;
270    };
271