xref: /linux/Documentation/devicetree/bindings/serial/qcom,serial-geni-qcom.yaml (revision db4a3f0fbedb0398f77b9047e8b8bb2b49f355bb) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/serial/qcom,serial-geni-qcom.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Geni based QUP UART interface
8
9maintainers:
10  - Andy Gross <agross@kernel.org>
11  - Bjorn Andersson <bjorn.andersson@linaro.org>
12
13allOf:
14  - $ref: /schemas/serial/serial.yaml#
15  - $ref: /schemas/soc/qcom/qcom,se-common-props.yaml#
16
17properties:
18  compatible:
19    enum:
20      - qcom,geni-uart
21      - qcom,geni-debug-uart
22
23  clocks:
24    maxItems: 1
25
26  clock-names:
27    const: se
28
29  interconnects:
30    maxItems: 2
31
32  interconnect-names:
33    items:
34      - const: qup-core
35      - const: qup-config
36
37  interrupts:
38    minItems: 1
39    items:
40      - description: UART core irq
41      - description: Wakeup irq (RX GPIO)
42
43  operating-points-v2: true
44
45  pinctrl-0: true
46  pinctrl-1: true
47
48  pinctrl-names:
49    minItems: 1
50    items:
51      - const: default
52      - const: sleep
53
54  power-domains:
55    maxItems: 1
56
57  reg:
58    maxItems: 1
59
60required:
61  - compatible
62  - clocks
63  - clock-names
64  - interrupts
65  - reg
66
67unevaluatedProperties: false
68
69examples:
70  - |
71    #include <dt-bindings/interrupt-controller/arm-gic.h>
72    #include <dt-bindings/clock/qcom,gcc-sc7180.h>
73    #include <dt-bindings/interconnect/qcom,sc7180.h>
74
75    serial@a88000 {
76        compatible = "qcom,geni-uart";
77        reg = <0xa88000 0x7000>;
78        interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
79        clock-names = "se";
80        clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>;
81        pinctrl-0 = <&qup_uart0_default>;
82        pinctrl-names = "default";
83        interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
84                        <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>;
85        interconnect-names = "qup-core", "qup-config";
86    };
87...
88