1*1e218a91SThierry Reding# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*1e218a91SThierry Reding%YAML 1.2 3*1e218a91SThierry Reding--- 4*1e218a91SThierry Reding$id: http://devicetree.org/schemas/serial/nvidia,tegra20-hsuart.yaml# 5*1e218a91SThierry Reding$schema: http://devicetree.org/meta-schemas/core.yaml# 6*1e218a91SThierry Reding 7*1e218a91SThierry Redingtitle: NVIDIA Tegra20/Tegra30 high speed (DMA based) UART controller driver 8*1e218a91SThierry Reding 9*1e218a91SThierry Redingmaintainers: 10*1e218a91SThierry Reding - Thierry Reding <thierry.reding@gmail.com> 11*1e218a91SThierry Reding - Jon Hunter <jonathanh@nvidia.com> 12*1e218a91SThierry Reding 13*1e218a91SThierry Redingproperties: 14*1e218a91SThierry Reding compatible: 15*1e218a91SThierry Reding oneOf: 16*1e218a91SThierry Reding - enum: 17*1e218a91SThierry Reding - nvidia,tegra20-hsuart 18*1e218a91SThierry Reding - nvidia,tegra30-hsuart 19*1e218a91SThierry Reding - nvidia,tegra186-hsuart 20*1e218a91SThierry Reding - nvidia,tegra194-hsuart 21*1e218a91SThierry Reding - items: 22*1e218a91SThierry Reding - const: nvidia,tegra124-hsuart 23*1e218a91SThierry Reding - const: nvidia,tegra30-hsuart 24*1e218a91SThierry Reding 25*1e218a91SThierry Reding reg: 26*1e218a91SThierry Reding maxItems: 1 27*1e218a91SThierry Reding 28*1e218a91SThierry Reding interrupts: 29*1e218a91SThierry Reding maxItems: 1 30*1e218a91SThierry Reding 31*1e218a91SThierry Reding clocks: 32*1e218a91SThierry Reding items: 33*1e218a91SThierry Reding - description: module clock 34*1e218a91SThierry Reding 35*1e218a91SThierry Reding resets: 36*1e218a91SThierry Reding items: 37*1e218a91SThierry Reding - description: module reset 38*1e218a91SThierry Reding 39*1e218a91SThierry Reding reset-names: 40*1e218a91SThierry Reding items: 41*1e218a91SThierry Reding - const: serial 42*1e218a91SThierry Reding 43*1e218a91SThierry Reding dmas: 44*1e218a91SThierry Reding items: 45*1e218a91SThierry Reding - description: DMA channel used for reception 46*1e218a91SThierry Reding - description: DMA channel used for transmission 47*1e218a91SThierry Reding 48*1e218a91SThierry Reding dma-names: 49*1e218a91SThierry Reding items: 50*1e218a91SThierry Reding - const: rx 51*1e218a91SThierry Reding - const: tx 52*1e218a91SThierry Reding 53*1e218a91SThierry Reding nvidia,enable-modem-interrupt: 54*1e218a91SThierry Reding $ref: /schemas/types.yaml#/definitions/flag 55*1e218a91SThierry Reding description: Enable modem interrupts. Should be enable only if all 8 lines of UART controller 56*1e218a91SThierry Reding are pinmuxed. 57*1e218a91SThierry Reding 58*1e218a91SThierry Reding nvidia,adjust-baud-rates: 59*1e218a91SThierry Reding $ref: /schemas/types.yaml#/definitions/uint32-matrix 60*1e218a91SThierry Reding description: | 61*1e218a91SThierry Reding List of entries providing percentage of baud rate adjustment within a range. Each entry 62*1e218a91SThierry Reding contains a set of 3 values: range low/high and adjusted rate. When the baud rate set on the 63*1e218a91SThierry Reding controller falls within the range mentioned in this field, the baud rate will be adjusted by 64*1e218a91SThierry Reding percentage mentioned here. 65*1e218a91SThierry Reding 66*1e218a91SThierry Reding Example: <9600 115200 200> 67*1e218a91SThierry Reding 68*1e218a91SThierry Reding Increase baud rate by 2% when set baud rate falls within range 9600 to 115200. 69*1e218a91SThierry Reding 70*1e218a91SThierry Reding Standard UART devices are expected to have tolerance for baud rate error by -4 to +4 %. All 71*1e218a91SThierry Reding Tegra devices till Tegra210 had this support. However, Tegra186 chip has a known hardware 72*1e218a91SThierry Reding issue. UART RX baud rate tolerance level is 0% to +4% in 1-stop config. Otherwise, the 73*1e218a91SThierry Reding received data will have corruption/invalid framing errors. Parker errata suggests adjusting 74*1e218a91SThierry Reding baud rate to be higher than the deviations observed in TX. 75*1e218a91SThierry Reding 76*1e218a91SThierry Reding TX deviation of connected device can be captured over scope (or noted from its spec) for 77*1e218a91SThierry Reding valid range and Tegra baud rate has to be set above actual TX baud rate observed. To do this 78*1e218a91SThierry Reding we use nvidia,adjust-baud-rates. 79*1e218a91SThierry Reding 80*1e218a91SThierry Reding As an example, consider there is deviation observed in TX for baud rates as listed below. 0 81*1e218a91SThierry Reding to 9600 has 1% deviation 9600 to 115200 2% deviation. This slight deviation is expcted and 82*1e218a91SThierry Reding Tegra UART is expected to handle it. Due to the issue stated above, baud rate on Tegra UART 83*1e218a91SThierry Reding should be set equal to or above deviation observed for avoiding frame errors. Property 84*1e218a91SThierry Reding should be set like this: 85*1e218a91SThierry Reding 86*1e218a91SThierry Reding nvidia,adjust-baud-rates = <0 9600 100>, 87*1e218a91SThierry Reding <9600 115200 200>; 88*1e218a91SThierry Reding items: 89*1e218a91SThierry Reding items: 90*1e218a91SThierry Reding - description: range lower bound 91*1e218a91SThierry Reding - description: range upper bound 92*1e218a91SThierry Reding - description: adjustment (in permyriad, i.e. 0.01%) 93*1e218a91SThierry Reding 94*1e218a91SThierry RedingallOf: 95*1e218a91SThierry Reding - $ref: serial.yaml 96*1e218a91SThierry Reding 97*1e218a91SThierry RedingunevaluatedProperties: false 98*1e218a91SThierry Reding 99*1e218a91SThierry Redingrequired: 100*1e218a91SThierry Reding - compatible 101*1e218a91SThierry Reding - reg 102*1e218a91SThierry Reding - interrupts 103*1e218a91SThierry Reding - clocks 104*1e218a91SThierry Reding - resets 105*1e218a91SThierry Reding - reset-names 106*1e218a91SThierry Reding - dmas 107*1e218a91SThierry Reding - dma-names 108*1e218a91SThierry Reding 109*1e218a91SThierry Redingexamples: 110*1e218a91SThierry Reding - | 111*1e218a91SThierry Reding #include <dt-bindings/clock/tegra30-car.h> 112*1e218a91SThierry Reding #include <dt-bindings/interrupt-controller/arm-gic.h> 113*1e218a91SThierry Reding 114*1e218a91SThierry Reding serial@70006000 { 115*1e218a91SThierry Reding compatible = "nvidia,tegra30-hsuart"; 116*1e218a91SThierry Reding reg = <0x70006000 0x40>; 117*1e218a91SThierry Reding interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; 118*1e218a91SThierry Reding nvidia,enable-modem-interrupt; 119*1e218a91SThierry Reding clocks = <&tegra_car TEGRA30_CLK_UARTA>; 120*1e218a91SThierry Reding resets = <&tegra_car 6>; 121*1e218a91SThierry Reding reset-names = "serial"; 122*1e218a91SThierry Reding dmas = <&apbdma 8>, <&apbdma 8>; 123*1e218a91SThierry Reding dma-names = "rx", "tx"; 124*1e218a91SThierry Reding nvidia,adjust-baud-rates = <1000000 4000000 136>; /* 1.36% shift */ 125*1e218a91SThierry Reding }; 126